|
|
PDF HIP1011A Data sheet ( Hoja de datos )
| Número de pieza | HIP1011A | |
| Descripción | PCI Hot Plug Controller | |
| Fabricantes | Intersil Corporation | |
| Logotipo |  |
|
Hay una vista previa y un enlace de descarga de HIP1011A (archivo pdf) en la parte inferior de esta página. Total 11 Páginas | ||
|
No Preview Available !
Data Sheet
HIP1011A
March 2000 File Number 4631.3
PCI Hot Plug Controller
The HIP1011A is the second PCI Hot Plug Voltage bus
control IC from Intersil. A drop-in alternative to the widely
used HIP1011, the HIP1011A has the same form, fit and
function but additionally features an adjustable latch-off time
of the MOSFET switches and fault reporting.
Like the HIP1011, the HIP1011A creates a small and simple
yet complete power control solution with discrete power
MOSFETs and a few passive components. Four
independent supplies are controlled, +5V, +3.3, +12V, and
-12V. The +12V and -12V switches are integrated. For the
+5V and +3.3V supplies, overcurrent (OC) protection is
provided by sensing the voltage across external current-
sense resistors. For the +12V and -12V supplies OC
protection is provided internally. In addition, an on-chip
reference is used to monitor the +5V, +3.3V and +12V
outputs for undervoltage (UV) conditions. The PWRON input
controls the state of the switches. During an OC condition on
any output, or a UV condition on the +5V, +3.3V or +12V
outputs, a LOW (0V) is asserted on the FLTN output and all
MOSFETs are latched-off. The time to FLTN signal going
LOW and MOSFET latch-off is determined by a single
capacitor from the FLTN pin to ground. This added feature
allows the system OS to complete housekeeping activities in
preparation for an unplanned shut down of the affected card.
The FLTN latch is cleared when the PWRON input is toggled
low again. During initial power-up of the main VCC supply
(+12V), the PWRON input is inhibited from turning on the
switches, and the latch is held in the Reset state until the
VCC input is greater than 10V.
User programmability of the overcurrent threshold, fault
reporting response time, latch-off response time and turn-on
slew rate is provided. A resistor connected to the OCSET pin
programs the OC threshold. A capacitor may be added to
the FLTN pin to adjust both the delay time to reporting a fault
and the latch-off of the supplies after an OC or UV event.
Capacitors connected to the gate pins set the turn-on rate. In
addition the HIP1011A has also been enhanced to tolerate
spurious system noise.
Features
• Adjustable Delay Time for Turn-Off and Fault Reporting
• Controls All PCI Supplies: +5V, +3.3V, +12V, -12V
• Internal MOSFET Switches for +12V and -12V Outputs
• µP Interface for On/Off Control and Fault Reporting
• Adjustable Overcurrent Protection for All Supplies
• Provides Fault Isolation
• Adjustable Turn-On Slew Rate
• Minimum Parts Count Solution
• No Charge Pump
Applications
• PCI Hot Plug
• CompactPCI
Ordering Information
TEMP. RANGE
PART NUMBER
(oC)
PACKAGE
HIP1011ACB
0 to 70 16 Ld SOIC
HIP1011ACB-T
0 to 70 Tape and Reel
PKG.
NO.
M16.15
Pinout
HIP1011A
(SOIC)
TOP VIEW
M12VIN 1
FLTN 2
3V5VG 3
VCC 4
12VIN 5
3VISEN 6
3VS 7
OCSET 8
16 M12VO
15 M12VG
14 12VG
13 GND
12 12VO
11 5VISEN
10 5VS
9 PWRON
1 CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 321-724-7143 | Copyright © Intersil Corporation 2000
1 page  
HIP1011A
Electrical Specifications
PARAMETER
Nominal 5.0V and 3.3V Input Supply Voltages,
VCC = 12VIN = 12V, M12VIN = -12V, TA = TJ = 0 to 70oC, Unless Otherwise Specified (Continued)
SYMBOL
TEST CONDITIONS
MIN TYP MAX UNITS
Gate Turn-On Time
(PWRON High to 3V5VG = 11V)
tON3V5V
C3V5VG = 0.1µF
-
280 500
µs
Gate Turn-Off Time
Gate Turn-Off Time
tOFF3V5V
C3V5VG = 0.1µF, 3V5VG from 9.5V to 1V
C3V5VG = 0.022µF, 3V5VG Falling 90% to
10%
-
-
13 17 µs
2 - µs
+12V SUPPLY CONTROL
On Resistance of Internal PMOS
Overcurrent Threshold
Overcurrent Threshold
12V Undervoltage Trip Threshold
Undervoltage Fault Response Time
Gate Charge Current
Turn-On Time
(PWRON High to 12VG = 1V)
rDS(ON)12
IOC12V_1
IOC12V_2
V12VUV
t12VUV
IC12VG
tON12V
PWRON = High,
TA = TJ = 25oC
ID
=
0.5A,
VOCSET = 0.6V
VOCSET = 1.2V
PWRON = High, V12VG = 3V
C12VG = 0.022µF
0.18 0.3 0.35
Ω
0.6 0.75 0.9
A
1.25 1.50
1.8
A
10.5 10.8 11.15
V
- 150 -
ns
23.5 25.0 28.5
µA
- 16 20 ms
Turn-Off Time
Turn-Off Time
tOFF12V
C12VG = 0.1µF, 12VG
C12VG = 0.022µF, 12VG Rising
10% - 90%
- 9 12 µs
- 3 - µs
-12V SUPPLY CONTROL
On Resistance of Internal NMOS
Overcurrent Threshold
Overcurrent Threshold
Gate Output Charge Current
Turn-On Time
(PWRON High to M12VG = -1V)
rDS(ON)M12
IOC12V_1
IOC12V_2
ICM12VG
tONM12V
PWRON = High, ID = 0.1A,
TA = TJ = 25oC
VOCSET = 0.6V
VOCSET = 1.2V
PWRON = High, V3VG = -4V
CM12VG = 0.022µF
0.5 0.7 0.9
0.15 0.18 0.25
0.30 0.37 0.50
22.5 25 27.5
- 160 300
Ω
A
A
µA
µs
Turn-On Time
(PWRON High to M12VO = -10.8V)
Turn-Off Time
Turn-Off Time
tONM12V
tOFFM12V
CM12VG = 0.022µF, CM12VO = 50µF,
RL = 120Ω
CM12VG = 0.1µF, M12VG
CM12VG = 0.022µF, M12VG Falling 90%
to 10%
-
-
-
16 - ms
18 23 µs
3 - µs
M12VIN Input Bias Current
CONTROL I/O PINS
IBM12VIN PWRON = High
- 2 2.6 mA
Supply Current
OCSET Current
Overcurrent to Fault Response Time
Overcurrent to Fault Response Time
IVCC
IOCSET
tOC
FLTN Cap = 100pF
FLTN Cap = 1000pF
4 5 5.8 mA
95 100 105 µA
-
500 960
ns
- 2200 -
ns
Overcurrent to Fault Response Time
FLTN Cap = 10µF
- 30 - µs
PWRON Threshold Voltage
FLTN Output Low Voltage
FLTN Output High Voltage
FLTN Output Latch Threshold
12V Power On Reset Threshold
VTHPWRON
VFLTN,OL
VFLTN,OH
VFLTN,TH
VPOR,TH
IFLTN = 2mA
IFLTN = 0 to -4mA
VCC Voltage Falling
0.8 1.6 2.1
V
- 0.6 0.9 V
3.9 4.3 4.9
V
1.8 2.3
3
V
9.4 10 10.6 V
5
5 Page 
HIP1011A
Small Outline Plastic Packages (SOIC)
N
INDEX
AREA
E
-B-
H
0.25(0.010) M B M
123
-A-
D
SEATING PLANE
A
L
h x 45o
-C-
e A1
B
0.25(0.010) M C A M B S
α
0.10(0.004)
C
NOTES:
1. Symbols are defined in the “MO Series Symbol List” in Section 2.2 of
Publication Number 95.
2. Dimensioning and tolerancing per ANSI Y14.5M-1982.
3. Dimension “D” does not include mold flash, protrusions or gate burrs.
Mold flash, protrusion and gate burrs shall not exceed 0.15mm (0.006
inch) per side.
4. Dimension “E” does not include interlead flash or protrusions. Interlead
flash and protrusions shall not exceed 0.25mm (0.010 inch) per side.
5. The chamfer on the body is optional. If it is not present, a visual index
feature must be located within the crosshatched area.
6. “L” is the length of terminal for soldering to a substrate.
7. “N” is the number of terminal positions.
8. Terminal numbers are shown for reference only.
9. The lead width “B”, as measured 0.36mm (0.014 inch) or greater above
the seating plane, shall not exceed a maximum value of 0.61mm
(0.024 inch).
10. Controlling dimension: MILLIMETER. Converted inch dimensions are
not necessarily exact.
M16.15 (JEDEC MS-012-AC ISSUE C)
16 LEAD NARROW BODY SMALL OUTLINE PLASTIC
PACKAGE
INCHES
MILLIMETERS
SYMBOL MIN MAX MIN MAX NOTES
A
0.0532 0.0688 1.35
1.75
-
A1
0.0040 0.0098 0.10
0.25
-
B 0.013 0.020 0.33 0.51 9
C
0.0075 0.0098 0.19
0.25
-
D 0.3859 0.3937 9.80 10.00 3
E
0.1497 0.1574 3.80
4.00
4
e 0.050 BSC
1.27 BSC
-
H
0.2284 0.2440 5.80
6.20
-
h
0.0099 0.0196 0.25
0.50
5
L 0.016 0.050 0.40 1.27 6
N 16
16 7
α 0o 8o 0o 8o -
Rev. 0 12/93
All Intersil semiconductor products are manufactured, assembled and tested under ISO9000 quality systems certification.
Intersil semiconductor products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time with-
out notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and
reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result
from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see web site www.intersil.com
Sales Office Headquarters
NORTH AMERICA
Intersil Corporation
P. O. Box 883, Mail Stop 53-204
Melbourne, FL 32902
TEL: (321) 724-7000
FAX: (321) 724-7240
EUROPE
Intersil SA
Mercure Center
100, Rue de la Fusee
1130 Brussels, Belgium
TEL: (32) 2.724.2111
FAX: (32) 2.724.22.05
ASIA
Intersil (Taiwan) Ltd.
7F-6, No. 101 Fu Hsing North Road
Taipei, Taiwan
Republic of China
TEL: (886) 2 2716 9310
FAX: (886) 2 2715 3029
11
11 Page | ||
| Páginas | Total 11 Páginas | |
| PDF Descargar | [ Datasheet HIP1011A.PDF ] | |
Hoja de datos destacado
| Número de pieza | Descripción | Fabricantes |
| HIP1011 | PCI Hot Plug Controller | Intersil Corporation |
| HIP1011A | PCI Hot Plug Controller | Intersil Corporation |
| HIP1011B | PCI Hot Plug Controller | Intersil Corporation |
| HIP1011D | Dual PCI Hot Plug Controller | Intersil Corporation |
| Número de pieza | Descripción | Fabricantes |
| SLA6805M | High Voltage 3 phase Motor Driver IC. |
 Sanken |
| SDC1742 | 12- and 14-Bit Hybrid Synchro / Resolver-to-Digital Converters. |
 Analog Devices |
|
DataSheet.es es una pagina web que funciona como un repositorio de manuales o hoja de datos de muchos de los productos más populares, |
| DataSheet.es | 2020 | Privacy Policy | Contacto | Buscar |