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PDF HIP0050 Data sheet ( Hoja de datos )

Número de pieza HIP0050
Descripción 0.3A/50V Octal Low Side Power Driver with Serial Bus Control and Over-Current Fault Flag
Fabricantes Intersil Corporation 
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HIP0050
December 1996
0.3A/50V Octal Low Side Power Driver with
Serial Bus Control and Over-Current Fault Flag
Features
Description
• Octal NDMOS Output Drivers in a High Voltage
Power BiMOS Process
- Each Capable of Sinking 300mA
- Low Idle and Standby Current
• Over-Stress Protection - Each Output:
- Over-Current Latch Off . . . . . . . . . 300mA Min
- Over-Voltage Clamp . . . . . . . . . . . . . . . 50V Typ
• Thermal Shutdown with Hysteresis
• Serial Data Input, Parallel Output Power Drive
• Short Circuit Latch Off for Each Output
• Common Enable for Output Drivers and
Data Storage Register
• Ambient Operating
Temperature Range. . . . . . . . . . . . .-40oC to 85oC
- Optional 125oC Maximum Ambient Operating
Temperature Range (Dissipation Limited)
Applications
• Automotive and Industrial Systems
The HIP0050 is a logic controlled, eight channel Octal Low Side
Power Driver. As shown in the block diagram, the outputs are con-
trolled via the serial data interface which allows the data to be
shifted out, allowing control of other cascaded serial devices. If an
Over-Current (OC) short circuit exists in one output, it may be inde-
pendently shutdown while the other outputs remain in operation.
When a shorted output is latched off, it may be turned back on
when the next serial input data is latched. A fault flag (FLT) is set to
a low status to indicate current-limited shutdown. The outputs are
independently latched off when an OC fault is detected. The fault
latch is cleared on the next data strobe. Over-Temperature (OT)
shutdown is provided with hysteresis to force global shutdown of
all output drivers. Shutdown is maintained until the on-chip temper-
ature falls below the minimum hysteresis threshold point.
The HIP0050 is fabricated in a Power BiMOS IC process, and is
intended for use in automotive and other applications having a
wide range of temperature and electrical stress conditions. It is
particularly suited for driving lamps, displays, relays, and solenoids in
applications where low operating power, high breakdown voltage,
and high output current at high temperature is required. Higher
current needs can be met by paralleling adjacent output drivers.
Ordering Information
• Solenoids, Relays and Lamp Drivers
• Logic and µP Controlled Drivers
• Robotic Controls
PART
NUMBER
HIP050IP
TEMP.
RANGE (oC)
-40 to 85
PACKAGE
20 Ld PDIP
PKG. NO.
E20.3
HIP0050IB
-40 to 85
24 Ld SOIC
M24.3
Pinouts
HIP0050
(PDIP)
TOP VIEW
DR2 1
DR3 2
FLT 3
EN 4
GND 5
GND 6
STR 7
SCK 8
DR4 9
DR5 10
20 DR1
19 DR0
18 SI
17 VCC
16 GND
15 GND
14 LGND
13 SO
12 DR7
11 DR6
HIP0050
(SOIC)
TOP VIEW
DR2 1
DR3 2
FLT 3
EN 4
GND 5
GND 6
GND 7
GND 8
STR 9
SCK 10
DR4 11
DR5 12
24 DR1
23 DR0
22 SI
21 VCC
20 GND
19 GND
18 GND
17 GND
16 LGND
15 SO
14 DR7
13 DR6
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
http://www.intersil.com or 407-727-9207 | Copyright © Intersil Corporation 1999
1
File Number 4034.1

1 page




HIP0050 pdf
HIP0050
Pin Descriptions
VCC Power Pin
The VCC pin is the positive 5V logic voltage supply input for
the IC. The normal operating voltage range is 4.5V to 5.5V.
When switched on, the POR forces all outputs off.
SCK Serial Clock Pin
SCK is the clock input for the SPI Interface. Output ON/OFF
control data is clocked into an eight stage shift register on
the rising edge of an external clock. This input has a Schmitt
trigger.
SI Serial Data In Pin
SI is the Serial Data Input Pin for the SPI Interface. The eight
power outputs are controlled by the serial data via the output
data buffer. This input has a Schmitt Trigger.
STR Strobe Pin for the SPI Interface
When the STR Pin is high, data from the 8-bit shift register is
passed into the output data buffers where it controls the ON-
OFF state of each output driver. The data is latched in the
output data buffers when STR goes low. This input has a
Schmitt trigger.
SO Serial Data Out Pin
The serial data out allows other ICs to be serially cascaded.
For example, a 10-bit LED driver may be located behind the
HIP0050. A controlling microprocessor may then clock out
18-bits of information and simultaneously strobe both parts.
The cascaded ICs may be the same or different from the
HIP0050.
DR0 - DR7 Outputs 0 Thru 7
The drain output pins of the DMOS Power Drivers are capa-
ble of sinking 300mA. Each output has short circuit protection
to independently shutdown the output under excessive high
load current conditions.
FLT Fault Flag
The fault flag pin indicates an over-current in any one of the
output drivers. (It is not an indicator for the thermal shutdown
mode.) The FLT output is active low and can sink 1.6mA
when activated. When latched low, it will remain latched until
the next data strobe.
EN Enable Pin
The enable pin is an active low enable function for all eight
output drivers. When EN is high, drive from the output data
buffer is held low and all output drivers are disabled. When
EN is low, the output drivers are enabled and data in the 8-bit
shift register is transparent to the output data buffer. This input
has a Schmitt trigger.
LGND and GND Pins
The LGND Pin is the 5V Logic Supply Ground for the IC and
GND is a common ground for the power output drivers.
1000
100
SAFE OPERATING AREA
BELOW LINE
10
1
0.1
1 10
TIME (ms)
100
FIGURE 2. MAXIMUM SINGLE PULSE ENERGY SAFE OPERATING AREA FOR EACH CLAMPED OUTPUT DRIVER, TA = 25oC
5

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