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PDF NJVMJD2955T4G Data sheet ( Hoja de datos )
| Número de pieza | NJVMJD2955T4G | |
| Descripción | Complementary Power Transistors | |
| Fabricantes | ON Semiconductor | |
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MJD2955,
NJVMJD2955T4G (PNP)
MJD3055,
NJVMJD3055T4G (NPN)
Complementary Power
Transistors
DPAK For Surface Mount Applications
Designed for general purpose amplifier and low speed switching
applications.
Features
Lead Formed for Surface Mount Applications in Plastic Sleeves
(No Suffix)
Straight Lead Version in Plastic Sleeves (“−1” Suffix)
Electrically Similar to MJE2955 and MJE3055
DC Current Gain Specified to 10 Amperes
High Current Gain−Bandwidth Product − fT = 2.0 MHz (Min) @ IC
= 500 mAdc
Epoxy Meets UL 94 V−0 @ 0.125 in
ESD Ratings:
Human Body Model, 3B > 8000 V
Machine Model, C > 400 V
NJV Prefix for Automotive and Other Applications Requiring
Unique Site and Control Change Requirements; AEC−Q101
Qualified and PPAP Capable
These are Pb−Free Packages*
http://onsemi.com
SILICON
POWER TRANSISTORS
10 AMPERES
60 VOLTS, 20 WATTS
DPAK
CASE 369C
STYLE 1
IPAK
CASE 369D
STYLE 1
MARKING DIAGRAMS
AYWW
J
xx55G
AYWW
J
xx55G
DPAK
IPAK
A = Assembly Location
Y = Year
WW = Work Week
Jxx55 = Device Code
x = 29 or 30
G = Pb−Free Package
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 3 of this data sheet.
*For additional information on our Pb−Free strategy and soldering details, please
download the ON Semiconductor Soldering and Mounting Techniques
Reference Manual, SOLDERRM/D.
Semiconductor Components Industries, LLC, 2012
February, 2012 − Rev. 12
1
Publication Order Number:
MJD2955/D
Free Datasheet http://www.datasheet4u.com/
1 page  
MJD2955, NJVMJD2955T4G (PNP) MJD3055, NJVMJD3055T4G (NPN)
2
TJ = 25C
1.6
1.2
0.8
0.4
0
0.1
VBE(sat) @ IC/IB = 10
VBE @ VCE = 3 V
VCE(sat) @ IC/IB = 10
0.2 0.3 0.5
1
23 5
IC, COLLECTOR CURRENT (AMP)
Figure 6. “On” Voltages, MJD2955
10
VCC
+ 30 V
+11 V
25 ms
RC
0 RB SCOPE
- 9 V
tr, tf 10 ns
DUTY CYCLE = 1%
51
D1
- 4 V
RB and RC VARIED TO OBTAIN DESIRED CURRENT LEVELS
D1 MUST BE FAST RECOVERY TYPE, eg:
1N5825 USED ABOVE IB 100 mA
MSD6100 USED BELOW IB 100 mA
Figure 7. Switching Time Test Circuit
1
0.7 D = 0.5
0.5
0.3 0.2
0.2
0.1
0.1 0.05
0.07
0.02
0.05
0.03 0.01
0.02 SINGLE PULSE
0.01
0.01 0.02 0.03 0.05 0.1
RqJC(t) = r(t) RqJC
RqJC = 6.25C/W MAX
D CURVES APPLY FOR POWER
PULSE TRAIN SHOWN
READ TIME AT t1
TJ(pk) - TC = P(pk) qJC(t)
P(pk)
t1
t2
DUTY CYCLE, D = t1/t2
0.2 0.3
0.5 1
2 3 5 10 20 30
t, TIME (ms)
Figure 8. Thermal Response
50
100 200 300 500 1 k
10
5
3
2
1
0.5
0.3
0.1
0.05
0.03
0.02
0.01
0.6
TJ = 150C
100 ms
1 ms
5 ms
500 ms
dc
WIRE BOND LIMIT
THERMAL LIMIT TC = 25C (D = 0.1)
SECOND BREAKDOWN LIMIT
1
2
4 6 10
20 40 60
VCE, COLLECTOR-EMITTER VOLTAGE (VOLTS)
Figure 9. Maximum Forward Bias
Safe Operating Area
FORWARD BIAS SAFE OPERATING AREA
INFORMATION
There are two limitations on the power handling ability of
a transistor: average junction temperature and second
breakdown. Safe operating area curves indicate IC − VCE
limits of the transistor that must be observed for reliable
operation; i.e., the transistor must not be subjected to greater
dissipation than the curves indicate.
The data of Figure 9 is based on TJ(pk) = 150_C; TC is
variable depending on conditions. Second breakdown pulse
limits are valid for duty cycles to 10% provided
TJ(pk) v 150_C. TJ(pk) may be calculated from the data in
Figure 8. At high case temperatures, thermal limitations will
reduce the power that can be handled to values less than the
limitations imposed by second breakdown.
http://onsemi.com
5
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