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PDF IR3876MBF Data sheet ( Hoja de datos )
| Número de pieza | IR3876MBF | |
| Descripción | SYNCHRONOUS BUCK REGULATOR | |
| Fabricantes | International Rectifier | |
| Logotipo |  |
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IR3876MBF
SupIRBuckTM
12A HIGHLY INTEGRATED
WIDE-INPUT VOLTAGE, SYNCHRONOUS BUCK REGULATOR
Features
Input Voltage Range: 3V to 21V
Output Voltage Range: 0.5V to 12V
Continuous 12A Load Capability
Constant On-Time control
Excellent Efficiency at very low output current levels
Compensation Loop not Required
Programmable switching frequency, soft start, and
over current protection
Power Good Output
Precision Voltage Reference (0.5V, +/-1%)
Pre-bias Start Up
Under/Over Voltage Fault Protection
Ultra small, low profile 5mm x 6mm QFN Package
Applications
Notebook and desktop computers
Game consoles
Consumer electronics – STB, LCD, TV, printers
General purpose POL DC-DC converters
Description
The IR3876 SupIRBuckTM is an easy-to-use,
fully integrated and highly efficient DC/DC
voltage regulator. The onboard constant on time
hysteretic controller and MOSFETs make
IR3876 a space-efficient solution that delivers up
to 12A of precisely controlled output voltage in
60°C ambient temperature applications without
airflow.
Programmable switching frequency, soft start,
and over current protection allows for a very
flexible solution suitable for many different
applications and an ideal choice for battery
powered applications.
Additional features include pre-bias startup, very
precise 0.5V reference, over/under voltage shut
down, power good output, and enable input with
voltage monitoring capability.
1
Free Datasheet http://www.datasheet4u.com/
1 page  
IR3876MBF
Recommended Operating Conditions
Symbol
VIN
VCC
VOUT
IOUT
Fs
TJ
Definition
Input Voltage
Supply Voltage
Output Voltage
Output Current
Switching Frequency
Junction Temperature
Min
3
4.5
0.5
0
N/A
0
Max
21*
7.5
12
12
1000
125
Unit
V
A
kHz
oC
* Note: PHASE pin must not exceed 25V.
Electrical Specifications
Unless otherwise specified, these specification apply over VIN = 12V, VCC = 5V, 0oC ≤ TJ ≤ 125oC.
PARAMETER
BIAS SUPPLIES
VCC Turn-on Threshold
VCC Turn-off Threshold
VCC Threshold Hysteresis
VCC Operating Current
NOTE
VCC Shutdown Current
FF Shutdown Current
VIN Shutdown Current
INTERNAL LDO OUTPUT
LDO Output Voltage Range
Output Current
CONTROL LOOP
Reference Accuracy, VREF
On-Time Accuracy
Min Off Time
Soft-Start Current
Zero Current Threshold
FAULT PROTECTION
ISET Pin Output Current
Under Voltage Threshold
Under Voltage Hysteresis
Over Voltage Threshold
Over Voltage Hysteresis
PGOOD Delay Threshold
(VSS)
1
1
1
1
TEST CONDITION
RFF = 200K,
EN = HIGH, Fs = 300kHz
EN = LOW
EN = LOW
EN = LOW
CLDO = 1µF
VREF
RFF = 180K, TJ = 65oC
EN = HIGH
Measure at VPHASE
Falling VFB & Monitor PGOOD
Rising VFB
Rising VFB & Monitor PGOOD
Falling VFB
MIN TYP MAX UNIT
3.9 4.2 4.5
V
3.6 3.9 4.2
V
150 mV
9.2 mA
35 50 µA
2 µA
1 µA
3.1 3.3 3.5
V
8 mA
0.495 0.5 0.505
280 300 320
400
8 10 12
-5 -2.4 0
V
ns
ns
µA
mV
18
0.37
0.58
20
0.4
10
0.62
10
1
22
0.43
0.66
µA
V
mV
V
mV
V
5
Free Datasheet http://www.datasheet4u.com/
5 Page 
CIRCUIT DESCRIPTION
PWM COMPARATOR
The PWM comparator initiates a SET signal
(PWM pulse) when the FB pin falls below the
reference (VREF) or the soft start (SS) voltage.
ON-TIME GENERATOR
The PWM on-time duration is programmed with
an external resistor (RFF) from the input supply
(VIN) to the FF pin. The simplified equation for
RFF is shown in equation 1. The FF pin is held to
an internal reference after EN goes HIGH. A copy
of the current in RFF charges a timing capacitor,
which sets the on-time duration, as shown in
equation 2.
RFF
1V
VOUT
20 pF
FSW
(1)
TON
RFF 1V 20 pF
VIN
(2)
SOFT START
An internal 10µA current source charges the
external capacitor on the SS pin to set the output
voltage slew rate during the soft start interval. The
output voltage reaches regulation when the FB pin
is above the under voltage threshold and the UV#
= HIGH. Once the voltage on the SS pin is above
the PGOOD delay threshold, the combination of
the SSDelay and UV# signals release the
PGOOD pin. With EN = LOW, the capacitor
voltage and SS pin is held to the FB pin voltage.
CONTROL LOGIC
The control logic monitors input power sources,
sequences the converter through the soft-start
and protective modes, and indicates output
voltage status on the PGOOD pin. VCC and
3VCBP pins are continuously monitored, and the
IR3876 will be disabled if the voltage of either pin
drops below the falling thresholds.
The IR3876 will initiate a soft start when VCC is in
the normal range and the EN pin = HIGH. In the
event of a sustained overload, a counter keeps
track of four soft-start cycles and then disables the
IR3876. The overload counter is only reset by EN
or UVLO.
IR3876MBF
GATE DRIVE LOGIC
The gate drive logic features adaptive dead
time, diode emulation, and a minimum lower
gate interval.
An adaptive dead time prevents the
simultaneous conduction of the upper and lower
MOSFETs. The lower gate voltage (LGATE)
must be below approximately 1V after PWM
goes HIGH before the upper MOSFET can be
gated on. Also, the upper gate voltage
(UGATE), the difference voltage between
UGATE and PHASE, must be below
approximately 1V after PWM goes LOW before
the lower MOSFET can be gated on.
The control MOSFET is gated on after the
adaptive delay for PWM = HIGH and the
synchronous MOSFET is gated on after the
adaptive delay for PWM = LOW. The lower
MOSFET is driven ‘off’ when the signal
ZCROSS indicates that the inductor current has
reversed as detected by the PHASE voltage
crossing the zero current threshold. The
synchronous MOSFET stays ‘off’ until the next
PWM falling edge. When the lower peak of
inductor current is above zero, a forced
continuous current condition is selected. The
control MOSFET is gated on after the adaptive
delay for PWM = HIGH, and the synchronous
MOSFET is gated on after the adaptive delay for
PWM = LOW.
The synchronous MOSFET gate is driven on for
a minimum duration. This minimum duration
allows time to recharge the bootstrap capacitor
and allows the current monitor to sample the
PHASE voltage.
11
Free Datasheet http://www.datasheet4u.com/
11 Page | ||
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