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IS61VVF409618B の電気的特性と機能

IS61VVF409618BのメーカーはISSIです、この部品の機能は「2M x 36 / 4M x 18 / 72 Mb SYNCHRONOUS FLOW-THROUGH STATIC RAM」です。


製品の詳細 ( Datasheet PDF )

部品番号 IS61VVF409618B
部品説明 2M x 36 / 4M x 18 / 72 Mb SYNCHRONOUS FLOW-THROUGH STATIC RAM
メーカ ISSI
ロゴ ISSI ロゴ 




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IS61VVF409618B Datasheet, IS61VVF409618B PDF,ピン配置, 機能
IS61LF204836B, IS61VF/VVF204836B
IS61LF409618B, IS61VF/VVF409618B
2M x 36, 4M x 18
72 Mb SYNCHRONOUS FLOW-THROUGH
STATIC RAM
ADVANCED INFORMATION
OCTOBER 2012
FEATURES
• Internal self-timed write cycle
• Individual Byte Write Control and Global Write
• Clock controlled, registered address, data and
control
• Burst sequence control using MODE input
• Three chip enable option for simple depth expan-
sion and address pipelining
• Common data inputs and data outputs
• Auto Power-down during deselect
• Single cycle deselect
• Snooze MODE for reduced-power standby
• JTAG Boundary Scan for PBGA package
• Power Supply
LF: Vdd 3.3V (+ 5%), Vddq 3.3V/2.5V (+ 5%)
VF: Vdd 2.5V (+ 5%), Vddq 2.5V (+ 5%)
VVF: Vdd 1.8V (+ 5%), Vddq 1.8V (+ 5%)
• JEDEC 100-Pin TQFP, 119-pin PBGA, and 165-
pin PBGA packages
• Lead-free available
DESCRIPTION
The 72Mb product family features  high-speed, low-power
synchronous static RAMs designed to provide burstable,
high-performance memory for communication and network-
ing applications. The IS61LF/VF204836B is organized as
2,096,952 words by 36 bits. The IS61LF/VF409618B is
organized as 4,193,904 words by 18 bits. Fabricated with
ISSI's advanced CMOS technology, the device integrates
a 2-bit burst counter, high-speed SRAM core, and high-
drive capability outputs into a single monolithic circuit. All
synchronous inputs pass through registers controlled by
a positive-edge-triggered single clock input.
Write cycles are internally self-timed and are initiated by the
rising edge of the clock input. Write cycles can be one to
four bytes wide as controlled by the write control inputs.
Separate byte enables allow individual bytes to be writ-
ten. Byte write operation is performed by using byte write
enable (BWE) input combined with one or more individual
byte write signals (BWx). In addition, Global Write (GW)
is available for writing all bytes at one time, regardless of
the byte write controls.
Bursts can be initiated with either ADSP (Address Status
Processor) or ADSC (Address Status Cache Controller)
input pins. Subsequent burst addresses can be gener-
ated internally and controlled by the ADV (burst address
advance) input pin.
The mode pin is used to select the burst sequence order,
Linear burst is achieved when this pin is tied LOW. Inter-
leave burst is achieved when this pin is tied HIGH or left
floating.
FAST ACCESS TIME
Symbol Parameter
tkq
Clock Access Time
tkc
Cycle Time
Frequency
-6.5
6.5
7.5
133
-7.5
7.5
8.5
117
Units
ns
ns
MHz
Copyright © 2012 Integrated Silicon Solution, Inc. All rights reserved. ISSI reserves the right to make changes to this specification and its products at any time without notice. ISSI assumes no
liability arising out of the application or use of any information, products or services described herein. Customers are advised to obtain the latest version of this device specification before relying on
any published information and before placing orders for products.
Integrated Silicon Solution, Inc. does not recommend the use of any of its products in life support applications where the failure or malfunction of the product can reasonably be expected to cause
failure of the life support system or to significantly affect its safety or effectiveness. Products are not authorized for use in such applications unless Integrated Silicon Solution, Inc. receives written
assurance to its satisfaction, that:
a.) the risk of injury or damage has been minimized;
b.) the user assume all such risks; and
c.) potential liability of Integrated Silicon Solution, Inc is adequately protected under the circumstances
Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774 1
Rev. 00B
10/15/2012
Free Datasheet http://www.datasheet4u.com/

1 Page





IS61VVF409618B pdf, ピン配列
IS61LF204836B, IS61VF/VVF204836B
IS61LF409618B, IS61VF/VVF409618B
165-PIN BGA
165-Ball, 13x15 mm BGA
165-Ball, 15x17 mm BGA
1 mm Ball Pitch, 11 x 15 Ball Array
119-PIN BGA
119-Ball, 14x22 mm BGA
1.27 mm Ball Pitch, 7 x 17 Ball Array
BOTTOM VIEW
BOTTOM VIEW
Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774
Rev. 00B
10/15/2012
3


3Pages


IS61VVF409618B 電子部品, 半導体
IS61LF204836B, IS61VF/VVF204836B
IS61LF409618B, IS61VF/VVF409618B
165 PBGA PACKAGE PIN CONFIGURATION
2M x 36 (TOP VIEW)
12
A NC
A
B NC
A
C DQPc NC
3
CE
CE2
Vddq
4
BWc
BWd
Vss
5
BWb
BWa
Vss
D
DQc
DQc
Vddq
Vdd
Vss
E
DQc
DQc
Vddq
Vdd
Vss
F
DQc
DQc
Vddq
Vdd
Vss
G
DQc
DQc
Vddq
Vdd
Vss
H NC NC NC Vdd Vss
J
DQd
DQd
Vddq
Vdd
Vss
K
DQd
DQd
Vddq
Vdd
Vss
L
DQd
DQd
Vddq
Vdd
Vss
M
DQd
DQd
Vddq
Vdd
N DQPd NC
Vddq
Vss
Vss
NC
P NC
A
A
A TDI
R MODE
A
A
A TMS
6
CE2
CLK
Vss
Vss
Vss
Vss
Vss
Vss
Vss
Vss
Vss
Vss
A
A1*
A0*
7
BWE
GW
Vss
Vss
Vss
Vss
Vss
Vss
Vss
Vss
Vss
Vss
NC
TDO
TCK
8
ADSC
OE
Vss
Vdd
Vdd
Vdd
Vdd
Vdd
Vdd
Vdd
Vdd
Vdd
Vss
A
A
9
ADV
ADSP
Vddq
Vddq
Vddq
Vddq
Vddq
NC
Vddq
Vddq
Vddq
Vddq
Vddq
A
A
10
A
A
NC
DQb
DQb
DQb
DQb
NC
DQa
DQa
DQa
DQa
NC
A
A
11
NC
NC
DQPb
DQb
DQb
DQb
DQb
ZZ
DQa
DQa
DQa
DQa
DQPa
A
A
Note: * A0 and A1 are the two least significant bits (LSB) of the address field and set the internal burst counter if burst is desired.
PIN DESCRIPTIONS
Symbol
Pin Name
A Synchronous Address Inputs
A0, A1
Synchronous Burst Address Inputs
ADV
Synchronous Burst Address
Advance
ADSP
Synchronous Address Status
Processor
ADSC
Synchronous Address Status
Controller
GW
Synchronous Global Write Enable
CLK
Synchronous Clock
CE, CE2, CE2 Synchronous Chip Select
BWa-BWd
Synchronous Byte Write
Controls
Symbol
Pin Name
BWE
Synchronous Byte Write Enable
OE Asynchronous Output Enable
ZZ Asynchronous Power Sleep Mode
MODE
Synchronous Burst Sequence Selection
TCK, TDO JTAG Pins
TMS, TDI
NC
DQa-DQd
No Connect
Synchronous Data Inputs/Outputs
DQPa-DQPd Synchronous Data Inputs/Outputs
Vdd
Power Supply
Vddq
I/O Power Supply
Vss Ground
6 Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774
Rev. 00B
10/15/2012

6 Page



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部品番号部品説明メーカ
IS61VVF409618B

2M x 36 / 4M x 18 / 72 Mb SYNCHRONOUS FLOW-THROUGH STATIC RAM

ISSI
ISSI


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