DataSheet.jp

ISL6252A の電気的特性と機能

ISL6252AのメーカーはIntersilです、この部品の機能は「Highly Integrated Battery Charger Controller」です。


製品の詳細 ( Datasheet PDF )

部品番号 ISL6252A
部品説明 Highly Integrated Battery Charger Controller
メーカ Intersil
ロゴ Intersil ロゴ 




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ISL6252A Datasheet, ISL6252A PDF,ピン配置, 機能
®
Data Sheet
ISL6252, ISL6252A
August 25, 2010
FN6498.3
Highly Integrated Battery Charger
Controller for Notebook Computers
The ISL6252, ISL6252A is a highly integrated battery charger
controller for Li-ion/Li-ion polymer batteries. High Efficiency is
achieved by a synchronous buck topology. The low side
MOSFET emulates a diode at light loads to improve the light
load efficiency and prevent system bus boosting.
The constant output voltage can be selected for 2, 3 and 4
series Li-ion cells with 0.5% accuracy over-temperature. It can
also be programmed between 4.2V + 5%/cell and
4.2V - 5%/cell to optimize battery capacity. When supplying
the load and battery charger simultaneously, the input current
limit for the AC adapter is programmable to within 3%
accuracy to avoid overloading the AC adapter, and to allow
the system to make efficient use of available adapter power
for charging. It also has a wide range of programmable
charging current. The ISL6252, ISL6252A provides outputs
that are used to monitor the current drawn from the AC
adapter, and monitor for the presence of an AC adapter. The
ISL6252, ISL6252A automatically transitions from regulating
current mode to regulating voltage mode.
Ordering Information
PART
NUMBER
(Notes 1, 2, 3)
PART
MARKING
TEMP
RANGE PACKAGE PKG.
(°C) (Pb-Free) DWG. #
ISL6252HRZ ISL 6252HRZ -10 to +100 28 Ld 5x5 L28.5x5
QFN
ISL6252HAZ ISL 6252HAZ -10 to +100 24 Ld
QSOP
M24.15
ISL6252AHRZ ISL6252 AHRZ -10 to +100 28 Ld 5x5 L28.5x5
QFN
ISL6252AHAZ ISL6252 AHAZ -10 to +100 24 Ld
QSOP
M24.15
NOTES:
1. Please refer to TB347 for details on reel specifications.
2. These Intersil Pb-free plastic packaged products employ
special Pb-free material sets, molding compounds/die
attach materials, and 100% matte tin plate plus anneal
(e3 termination finish, which is RoHS compliant and
compatible with both SnPb and Pb-free soldering
operations). Intersil Pb-free products are MSL classified
at Pb-free peak reflow temperatures that meet or
exceed the Pb-free requirements of IPC/JEDEC J STD-
020.
3. For Moisture Sensitivity Level (MSL), please see device
information page for ISL6252, ISL6252A. For more
information on MSL please see techbrief TB363.
Features
• ±0.5% Charge Voltage Accuracy (-10°C to +100°C)
• ±3% Accurate Input Current Limit
• ±3% Accurate Battery Charge Current Limit
• ±25% Accurate Battery Trickle Charge Current Limit
• Programmable Charge Current Limit, Adapter Current
Limit and Charge Voltage
• Fixed 300kHz PWM Synchronous Buck Controller with
Diode Emulation at Light Load
• Overvoltage Protection
• Output for Current Drawn from AC Adapter
• AC Adapter Present Indicator
• Fast Input Current Limit Response
• Input Voltage Range 7V to 25V
• Support 2-, 3- and 4-Cells Battery Pack
• Up to 17.64V Battery-Voltage Set Point
• Thermal Shutdown
• Less than 10µA Battery Leakage Current
http://www.DataSheet4U.net/
• Supports Pulse Charging
• Pb-free (RoHS Compliant)
Applications
• Notebook, Desknote and Sub-notebook Computers
• Personal Digital Assistant
1 CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-468-3774 | Intersil (and design) is a registered trademark of Intersil Americas Inc.
Copyright Intersil Americas Inc. 2007, 2008, 2010. All Rights Reserved
All other trademarks mentioned are the property of their respective owners.

1 Page





ISL6252A pdf, ピン配列
ISL6252, ISL6252A
ICM
ACSET
ACPRN
ACLIM
+
- 1.26V
VREF
152kΩ
152kΩ
ADAPTER
CURRENT
LIMIT SET
-
gm3
+
CSIP CSIN
+-
X19.9
CA1
LDO
REGULATOR
DCIN
VDD
ICOMP
VCOMP
VADJ
CELLS
VREF
MIN
CURRENT
BUFFER
MIN
VOLTAGE
BUFFER
Σ
300kHz
RAMP
-
PWM
+
VREF
514kΩ
514kΩ
gm1
-
2.1V
VOLTAGE
SELECTOR
VDD
REFERENCE
-0.25
288kΩ
32kΩ
gm2
-
16kΩ
48kΩ
http://www.DataSheet4U.net/
CA2
X19.9
-+
GND
FB CSON CSOP CHLIM
FIGURE 1. FUNCTIONAL BLOCK DIAGRAM
BOOT
UGATE
PHASE
VDDP
LGATE
PGND
1.065V
-
+
EN
3 FN6498.3
August 25, 2010


3Pages


ISL6252A 電子部品, 半導体
ISL6252, ISL6252A
Absolute Maximum Ratings
ACSET to GND (Note 4) . . . . . . . . . . . . . . . . . . -0.3V to VDD +0.3V
DCIN, CSIP, CSON to GND. . . . . . . . . . . . . . . . . . . . . -0.3V to +28V
CSIP-CSIN, CSOP-CSON . . . . . . . . . . . . . . . . . . . . . -0.3V to +0.3V
PHASE to GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -7V to 30V
BOOT to GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to +35V
BOOT to VDDP . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -2V to 28V
ACLIM, ACPRN, CHLIM, VDD to GND . . . . . . . . . . . . . . -0.3V to 7V
BOOT-PHASE, VDDP-PGND . . . . . . . . . . . . . . . . . . . . . -0.3V to 7V
ICM, ICOMP, VCOMP to GND. . . . . . . . . . . . . . -0.3V to VDD +0.3V
VREF, CELLS to GND . . . . . . . . . . . . . . . . . . . . -0.3V to VDD +0.3V
EN, VADJ, PGND to GND . . . . . . . . . . . . . . . . . -0.3V to VDD +0.3V
UGATE. . . . . . . . . . . . . . . . . . . . . . . . PHASE -0.3V to BOOT +0.3V
LGATE . . . . . . . . . . . . . . . . . . . . . . . . . PGND -0.3V to VDDP +0.3V
Thermal Information
Thermal Resistance
θJA (°C/W) θJC (°C/W)
QFN Package (Notes 5, 6). . . . . . . . . .
39
9.5
QSOP Package (Note 5) . . . . . . . . . . .
80
N/A
Junction Temperature Range. . . . . . . . . . . . . . . . . .-10°C to +150°C
Operating Temperature Range . . . . . . . . . . . . . . . .-10°C to +100°C
Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . .-65°C to +150°C
Pb-free reflow profile . . . . . . . . . . . . . . . . . . . . . . . . . .see link below
http://www.intersil.com/pbfree/Pb-FreeReflow.asp
CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions may adversely impact product reliability and
result in failures not covered by warranty.
NOTES:
4. ACSET may be operated 1V below GND if the current through ACSET is limited to less than 1mA.
5. θJA is measured in free air with the component mounted on a high effective thermal conductivity test board with “direct attach” features. See Tech
Brief TB379.
6. For θJC, the “case temp” location is the center of the exposed metal pad on the package underside.
Electrical Specifications
DCIN = CSIP = CSIN = 18V, CSOP = CSON = 12V, ACSET = 1.5V, ACLIM = VREF, VADJ = Floating,
EN = VDD = 5V, BOOT-PHASE = 5.0V, GND = PGND = 0V, CVDD = 1µF, IVDD = 0mA, TA = -10°C to +100°C,
TJ +125°C, Unless Otherwise Noted. Boldface limits apply over the operating temperature
range, -10°C to +100°C.
PARAMETER
TEST CONDITIONS
MIN
(Note 8)
TYP
MAX
(Note 8)
UNITS
SUPPLY AND BIAS REGULATOR
DCIN Input Voltage Range
DCIN Quiescent Current
http://www.DataSheet4U.net/
EN = VDD or GND, 7V DCIN 25V
7 25 V
1.4 3 mA
Battery Leakage Current (Note 6)
DCIN = 0, no load
3 10 µA
VDD Output Voltage/Regulation
VDD Undervoltage Lockout Trip Point
7V DCIN 25V, 0 IVDD 30mA
VDD Rising
4.925
4.0
5.075
4.4
5.225
4.6
V
V
Hysteresis
200 250 400 mV
Reference Output Voltage VREF
Battery Charge Voltage Accuracy
0 IVREF 300µA
2.365 2.39 2.415
CSON = 16.8V, CELLS = VDD, VADJ = Float
-0.5
0.5
V
%
CSON = 12.6V, CELLS = GND, VADJ = Float
-0.5
0.5 %
CSON = 8.4V, CELLS = Float, VADJ = Float
-0.5
0.5 %
CSON = 17.64V, CELLS = VDD, VADJ = VREF
-0.5
0.5 %
CSON = 13.23V, CELLS = GND,
VADJ = VREF
-0.5
0.5 %
CSON = 8.82V, CELLS = Float, VADJ = VREF
-0.5
0.5 %
CSON = 15.96V, CELLS = VDD, VADJ = GND
-0.5
0.5 %
CSON = 11.97V, CELLS = GND, VADJ = GND
-0.5
0.5 %
CSON = 7.98V, CELLS = Float, VADJ = GND
-0.5
0.5 %
TRIP POINTS
ACSET Threshold
1.24 1.26 1.28
V
ACSET Input Bias Current Hysteresis
2.4 3.4 4.4 µA
ACSET Input Bias Current
ACSET 1.26V
2.4 3.4 4.4 µA
ACSET Input Bias Current
ACSET < 1.26V
-1 0 1 µA
6 FN6498.3
August 25, 2010

6 Page



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部品番号部品説明メーカ
ISL6252

Highly Integrated Battery Charger Controller

Intersil
Intersil
ISL6252A

Highly Integrated Battery Charger Controller

Intersil
Intersil


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