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UM10204のメーカーはNXP Semiconductorsです、この部品の機能は「I2C-bus specification and user manual」です。


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部品番号 UM10204
部品説明 I2C-bus specification and user manual
メーカ NXP Semiconductors
ロゴ NXP Semiconductors ロゴ 




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UM10204 Datasheet, UM10204 PDF,ピン配置, 機能
UM10204
I2C-bus specification and user manual
Rev. 4 — 13 February 2012
User manual
Document information
Info Content
Keywords
I2C, I2C-bus, Standard-mode, Fast-mode, Fast-mode Plus, Fm+,
Ultra Fast-mode, UFm, High Speed, Hs, inter-IC, SDA, SCL, USDA, USCL
Abstract
Philips Semiconductors (now NXP Semiconductors) developed a simple
bidirectional 2-wire bus for efficient inter-IC control. This bus is called the
Inter-IC or I2C-bus. Only two bus lines are required: a serial data line
(SDA) and a serial clock line (SCL). Serial, 8-bit oriented, bidirectional
data transfers can be made at up to 100 kbit/s in the Standard-mode, up to
400 kbit/s in the Fast-mode, up to 1 Mbit/s in the Fast-mode Plus (Fm+), or
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up to 3.4 Mbit/s in the High-speed mode. The Ultra Fast-mode is a
uni-directional mode with data transfers of up to 5 Mbit/s.
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UM10204 pdf, ピン配列
NXP Semiconductors
UM10204
I2C-bus specification and user manual
1. Introduction
The I2C-bus is a de facto world standard that is now implemented in over 1000 different
ICs manufactured by more than 50 companies. Additionally, the versatile I2C-bus is used
in various control architectures such as System Management Bus (SMBus), Power
Management Bus (PMBus), Intelligent Platform Management Interface (IPMI), Display
Data Channel (DDC) and Advanced Telecom Computing Architecture (ATCA).
This document assists device and system designers to understand how the I2C-bus works
and implement a working application. Various operating modes are described. It contains
a comprehensive introduction to the I2C-bus data transfer, handshaking and bus
arbitration schemes. Detailed sections cover the timing and electrical specifications for the
I2C-bus in each of its operating modes.
Designers of I2C-compatible chips should use this document as a reference and ensure
that new devices meet all limits specified in this document. Designers of systems that
include I2C devices should review this document and also refer to individual component
data sheets.
2. I2C-bus features
In consumer electronics, telecommunications and industrial electronics, there are often
many similarities between seemingly unrelated designs. For example, nearly every
system includes:
Some intelligent control, usually a single-chiphttp://www.DataSheet4U.net/ microcontroller
General-purpose circuits like LCD and LED drivers, remote I/O ports, RAM,
EEPROM, real-time clocks or A/D and D/A converters
Application-oriented circuits such as digital tuning and signal processing circuits for
radio and video systems, temperature sensors, and smart cards
To exploit these similarities to the benefit of both systems designers and equipment
manufacturers, as well as to maximize hardware efficiency and circuit simplicity, Philips
Semiconductors (now NXP Semiconductors) developed a simple bidirectional 2-wire bus
for efficient inter-IC control. This bus is called the Inter IC or I2C-bus. All I2C-bus
compatible devices incorporate an on-chip interface which allows them to communicate
directly with each other via the I2C-bus. This design concept solves the many interfacing
problems encountered when designing digital control circuits.
Here are some of the features of the I2C-bus:
Only two bus lines are required; a serial data line (SDA) and a serial clock line (SCL).
Each device connected to the bus is software addressable by a unique address and
simple master/slave relationships exist at all times; masters can operate as
master-transmitters or as master-receivers.
It is a true multi-master bus including collision detection and arbitration to prevent data
corruption if two or more masters simultaneously initiate data transfer.
Serial, 8-bit oriented, bidirectional data transfers can be made at up to 100 kbit/s in
the Standard-mode, up to 400 kbit/s in the Fast-mode, up to 1 Mbit/s in Fast-mode
Plus, or up to 3.4 Mbit/s in the High-speed mode.
UM10204
User manual
All information provided in this document is subject to legal disclaimers.
Rev. 4 — 13 February 2012
© NXP B.V. 2012. All rights reserved.
3 of 64
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UM10204 電子部品, 半導体
NXP Semiconductors
UM10204
I2C-bus specification and user manual
2.3 IC designer benefits
Designers of microcontrollers are frequently under pressure to conserve output pins. The
I2C protocol allows connection of a wide variety of peripherals without the need for
separate addressing or chip enable signals. Additionally, a microcontroller that includes an
I2C interface is more successful in the marketplace due to the wide variety of existing
peripheral devices available.
3. The I2C-bus protocol
3.1 Standard-mode, Fast-mode and Fast-mode Plus I2C-bus protocols
Two wires, serial data (SDA) and serial clock (SCL), carry information between the
devices connected to the bus. Each device is recognized by a unique address (whether
it is a microcontroller, LCD driver, memory or keyboard interface) and can operate as
either a transmitter or receiver, depending on the function of the device. An LCD driver
may be only a receiver, whereas a memory can both receive and transmit data. In addition
to transmitters and receivers, devices can also be considered as masters or slaves when
performing data transfers (see Table 1). A master is the device which initiates a data
transfer on the bus and generates the clock signals to permit that transfer. At that time,
any device addressed is considered a slave.
Table 1. Definition of I2C-bus terminology
Term
Description
Transmitter
the device which sends data to the bus
Receiver
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the device which receives data from the bus
Master
the device which initiates a transfer, generates clock signals and
terminates a transfer
Slave
the device addressed by a master
Multi-master
more than one master can attempt to control the bus at the same time
without corrupting the message
Arbitration
procedure to ensure that, if more than one master simultaneously tries to
control the bus, only one is allowed to do so and the winning message is
not corrupted
Synchronization
procedure to synchronize the clock signals of two or more devices
The I2C-bus is a multi-master bus. This means that more than one device capable of
controlling the bus can be connected to it. As masters are usually microcontrollers, let us
consider the case of a data transfer between two microcontrollers connected to the
I2C-bus (see Figure 2).
UM10204
User manual
All information provided in this document is subject to legal disclaimers.
Rev. 4 — 13 February 2012
© NXP B.V. 2012. All rights reserved.
6 of 64
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共有リンク

Link :


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I2C-bus specification and user manual

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