|
|
PDF IS34C02 Data sheet ( Hoja de datos )
| Número de pieza | IS34C02 | |
| Descripción | 2K-bit 2-WIRE SERIAL CMOS EEPROM | |
| Fabricantes | ISSI | |
| Logotipo |  |
|
Hay una vista previa y un enlace de descarga de IS34C02 (archivo pdf) en la parte inferior de esta página. Total 15 Páginas | ||
|
No Preview Available !
IS34C02
2K-bit 2-WIRE SERIAL CMOS EEPROM
with Permanent Write-Protection
ISSI®
ADVANCED INFORMATION
JANUARY 2005
FEATURES
DESCRIPTION
• Two-Wire Serial Interface, I2CTM compatible
– Bidirectional data transfer protocol
– 400 kHz (2.5V) and 1 MHz (5.0V) compatibility
• Organization:
– 256 x 8-bit
• Data Protection Features
– Write Protect Pin
– Permanent Software Protection
• 16-Byte Page Write Buffer
– Partial Page-writes permitted
• Low Power CMOS Technology
– Active Current less than 2 mA (5V)
– Standby Current less than 6 µA (5V)
– Standby Current less than 2 µA (2.5V)
• Low Voltage Operation
– IS34C02-2: Vcc = 1.8V to 5.5V
– IS34C02-3: Vcc = 2.5V to 5.5V
• Random or Sequential Read Modes
• Filtered Inputs for Noise Suppression
• Self timed Write cycle with auto clear
– 5 ms @ 2.5V
The IS34C02 is an electrically erasable PROM device
that uses the standard 2-wire interface for
communications. The IS34C02 contains a memory
array of 2,048-bits (256K x 8), and is further subdivided
into 16 pages of 16 bytes each for page-write mode.
The software write-protection feature is initiated with a
unique irreversible instruction. After this command is
transmitted, the first 128 bytes of the array become
permanently read-only. This feature is popular in
applications like DRAM DIMMs to retain DRAM related
data. This EEPROM is offered in wide operating voltages
of 1.8V to 5.5V (IS34C02-2) and 2.5V to 5.5V (IS34C02-
3) to be compatible with most application voltages. ISSI
designed the IS34C02 as a low-cost and low-power 2-
wire EEPROM solution. The devices are packaged in
8-pin SOIC, and 8-pin TSSOP, and 8-pin MSOP.
The IS34C02 maintains compatibility with the popular 2-
http://www.DataSheet4U.net/
wire bus protocol, so it is easy to use in applications
implementing this bus type. The simple bus consists of
the Serial Clock wire (SCL) and the Serial Data wire
(SDA). Using the bus, a Master device such as a
microcontroller is usually connected to one or more
Slave devices such as the IS34C02. The bit stream
over the SDA line includes a series of bytes, which
identifies a particular Slave device, an instruction, an
address within that Slave device, and a series of data, if
appropriate. The IS34C02 has a Write Protect pin (WP)
to allow blocking of any write instruction transmitted over
the bus.
• High Reliability
– Endurance: 1,000,000 Cycles
– Data Retention: 40 Years
• Automotive and Industrial temperature ranges
• 8-pin SOIC, 8-pin TSSOP, and 8-pin MSOP
• Lead-free available
Copyright © 2005 Integrated Silicon Solution, Inc. All rights reserved. ISSI reserves the right to make changes to this specification and its products at any time without notice. ISSI assumes no liability
arising out of the application or use of any information, products or services described herein. Customers are advised to obtain the latest version of this device specification before relying on any published
information and before placing orders for products.
Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774
ADVANCED INFORMATION Rev.00E
01/12/05
1
datasheet pdf - http://www.DataSheet4U.net/
1 page  
IS34C02
ISSI®
WRITE OPERATION
Permanent Write Protection
Byte Write
In the Byte Write mode, the Master device sends the Start
condition and the Slave address information (with the R/W
set to Zero) to the Slave device. After the Slave generates
an ACK, the Master sends a byte address that is written into
the address pointer of the IS34C02. After receiving another
ACK from the Slave, the Master device transmits the data
byte to be written into the address memory location. The
IS34C02 acknowledges once more and the Master
generates the Stop condition, at which time the device
begins its internal programming cycle. While this internal
cycle is in progress, the device will not respond to any
request from the Master device.
Page Write
The IS34C02 is capable of 16-byte Page-Write operation. A
Page-Write is initiated in the same manner as a Byte Write,
but instead of terminating the internal Write cycle after the
first data byte is transferred, the Master device can transmit
up to 15 more bytes. After the receipt of each data byte, the
IS34C02 responds immediately with an ACK on SDA line,
and the four lower order data byte address bits are internally
incremented by one, while the higher order bits of the data
byte address remain constant. If a byte address is
incremented from the last byte of a page, it returns to the first
byte of that page. If the Master device should transmit more
than 16 bytes prior to issuing the Stop condition, the address
counter will “roll over,” and the previously written data will be
overwritten. Once all 16 bytes are received and the Stop
condition has been sent by the Master, the internal
programming cycle begins. At this point, all received data is
written to the IS34C02 in a single Write cycle. All inputs are
disabled until completion of the internal Write cycle.
The IS34C02 contains a permanent write protection feature
that is initiated by means of a software command. After the
command is transmitted, the protected area becomes
irreversibly read-only despite power removal and re-
application on the device. The address range of the 128
bytes of the array that is affected by this feature is 00h-7Fh.
Once enabled, the permanent protection is independent of
the status of the WP pin. (If WP is raised to High, the entire
array is read-only. If WP is low, the region 00h-7Fh can still
be read-only.)
The software command is initiated similarly to a normal
byte write operation; however, the slave address begins
with the bits 0110 (see Figure 5). The following three bits
are A2 - A0. The last bit of the slave address (R/W) is 0. If
the IS34C02 responds with ACK, the device has not yet had
its write-protection permanently enabled. To complete the
command, the Master must transmit a dummy address
byte, dummy data byte, and a Stop signal (see Figure 11).
The WP pin must be Low during this command. Before
resuming any other command, the internal write cycle
should be observed.
The status of the permanent write protection can be safely
determined without any changes by transmitting the same
Slavehttp://www.DataSheet4U.net/ address as above, but with the last bit (R/W) set to 1
(see Figure 12). If the permanent write protection has been
enabled, the IS34C02 will not acknowledge any slave
address starting with bits 0110 (see Figure 5).
Acknowledge (ACK) Polling
The disabling of the inputs can be used to take advantage
of the typical Write cycle time. Once the Stop condition is
issued to indicate the end of the host's Write operation, the
IS34C02 initiates the internal Write cycle. ACK polling can
be initiated immediately. This involves issuing the Start
condition followed by the Slave address for a Write operation.
If the IS34C02 is still busy with the Write operation, no ACK
will be returned. If the IS34C02 has completed the Write
operation, an ACK will be returned and the host can then
proceed with the next Read or Write operation.
Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774
ADVANCED INFORMATION Rev.00E
01/12/05
5
datasheet pdf - http://www.DataSheet4U.net/
5 Page 
IS34C02
ISSI®
ABSOLUTE MAXIMUM RATINGS(1)
Symbol Parameter
Value
Unit
VS Supply Voltage
–0.5 to +6.5
V
VP Voltage on Any Pin
–0.5 to Vcc + 0.5 V
TBIAS
Temperature Under Bias
–55 to +125
°C
TSTG
Storage Temperature
–65 to +150
°C
IOUT Output Current
5 mA
Notes:
1. Stress greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause
permanent damage to the device. This is a stress rating only and functional operation
of the device at these or any other conditions above those indicated in the operational
sections of this specification is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect reliability.
OPERATING RANGE
(IS34C02-2)
Range
Industrial
Ambient Temperature
–40°C to +85°C
VCC
1.8V to 5.5V
OPERATING RANGE
(IS34C02-3)
Range
Ambient Temperature
Automotive
–40°C to +125°C
Note: Automotive data is preliminary.
http://www.DataSheet4U.net/
VCC
2.5V to 5.5V
CAPACITANCE(1,2)
Symbol Parameter
Conditions
Max.
Unit
CIN Input Capacitance
VIN = 0V
6 pF
COUT
Output Capacitance
VOUT = 0V
8 pF
Notes:
1. Tested initially and after any design or process changes that may affect these parameters.
2. Test conditions: TA = 25°C, f = 1 MHz, Vcc = 5.0V.
Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774
ADVANCED INFORMATION Rev.00E
01/12/05
11
datasheet pdf - http://www.DataSheet4U.net/
11 Page | ||
| Páginas | Total 15 Páginas | |
| PDF Descargar | [ Datasheet IS34C02.PDF ] | |
Hoja de datos destacado
| Número de pieza | Descripción | Fabricantes |
| IS34C02 | 2K-bit 2-WIRE SERIAL CMOS EEPROM | ISSI |
| IS34C02 | 2K-bit 2-WIRE SERIAL CMOS EEPROM | ISSI |
| IS34C02B | 2K-bit 2-WIRE SERIAL CMOS EEPROM | ISSI |
| IS34C02B | 2K-bit 2-WIRE SERIAL CMOS EEPROM | ISSI |
| Número de pieza | Descripción | Fabricantes |
| SLA6805M | High Voltage 3 phase Motor Driver IC. |
 Sanken |
| SDC1742 | 12- and 14-Bit Hybrid Synchro / Resolver-to-Digital Converters. |
 Analog Devices |
|
DataSheet.es es una pagina web que funciona como un repositorio de manuales o hoja de datos de muchos de los productos más populares, |
| DataSheet.es | 2020 | Privacy Policy | Contacto | Buscar |