|
|
92HD99のメーカーはIDTです、この部品の機能は「SINGLE CHIP PC AUDIO SYSTEM」です。 |
部品番号 | 92HD99 |
| |
部品説明 | SINGLE CHIP PC AUDIO SYSTEM | ||
メーカ | IDT | ||
ロゴ | |||
このページの下部にプレビューと92HD99ダウンロード(pdfファイル)リンクがあります。 Total 30 pages
SINGLE CHIP PC AUDIO SYSTEM
CODEC+SPEAKER AMPLIFIER+CAPLESS HP+LDO
Description
The 92HD99 single-chip audio system is a low power
optimized, high fidelity, 4-channel audio codec with stereo
integrated speaker amplifier, capless headphone amplifier,
and low drop out voltage regulator.
The high integration of the 92HD99 enables the smallest
PCB footprint with the lowest system BOM count and cost.
92HD99 provides high quality HD Audio capability to
notebook and business desktop PC applications.
DATASHEET
92HD99
Features
• 4 Channels (2 stereo DACs and 2 stereo ADCs)
with 24-bit resolution
• Supports full-duplex stereo audio and simultaneous
VoIP
• 2W Class-D stereo BTL speaker amplifier @
4 ohms and 5V
• 10 band hardware parametric equalizer
• Hardware compressor limiter
• Dedicated BTL high pass filter for speaker protection
• Capless headphone amplifier with charge
pump/LDO
• Combo Jack Support allowing for dual-function
headphone and headset detection
• Full HDA015-B low power support
• Internal digital core LDO voltage regulator
• Microsoft WLP desktop premium logo compliant
• Support for 1.5V and 3.3V HDA signaling
• Digital microphone inputs (mono or stereo mics)
• Microphone Mute Input (on WB revisions and
www.DataSheet.net/
beyond)
• High performance analog mixer
• 2 adjustable VREF Out pins for analog microphone
bias
• 5 analog ports with port presence detect (4 single
ended, 1 BTL)
• Analog and digital PC Beep support
• AUX Audio mode for playback
• 40-pad QFN RoHS packages
IDT CONFIDENTIAL
©2009 INTEGRATED DEVICE TECHNOLOGY, INC.
1
V1.2 1/12
92HD99
Datasheet pdf - http://www.DataSheet4U.co.kr/
1 Page 92HD99
SINGLE CHIP PC AUDIO SYSTEM, CODEC+SPEAKER AMPLIFIER+CAPLESS HP+LDO
TABLE OF CONTENTS
1. DESCRIPTION ........................................................................................................................ 10
1.1. Overview ..........................................................................................................................................10
1.2. Orderable Part Numbers ..................................................................................................................10
2. DETAILED DESCRIPTION ..................................................................................................... 11
2.1. Port Functionality .............................................................................................................................11
2.1.1. Port Characteristics ............................................................................................................11
2.1.2. Vref_Out .............................................................................................................................13
2.1.3. Jack Detect ........................................................................................................................13
2.2. Mixer ................................................................................................................................................13
2.3. ADC Multiplexers .............................................................................................................................14
2.4. Power Management .........................................................................................................................14
2.5. AFG D0 ............................................................................................................................................15
2.6. AFG D1 ............................................................................................................................................15
2.7. AFG D2 ............................................................................................................................................15
2.8. AFG D3 ............................................................................................................................................15
2.8.1. AFG D3cold .......................................................................................................................15
2.9. Vendor Specific Function Group Power States D4/D5 ....................................................................16
2.10. Low-voltage HDA Signaling ...........................................................................................................16
2.11. Multi-channel capture ....................................................................................................................16
2.12. EAPD .............................................................................................................................................18
2.13. Digital Microphone Support ...........................................................................................................21
2.14. Analog PC-Beep ............................................................................................................................24
2.15. Digital PC-Beep .............................................................................................................................26
2.16. Headphone Drivers ........................................................................................................................27
2.17. BTL Amplifier .................................................................................................................................27
2.18. BTL Amplifier High-Pass Filter .......................................................................................................27
2.18.1. Filter Description ..............................................................................................................28
2.19. EQ ..................................................................................................................................................28
2.20. Combo Jack Detection ............................................www..Data.Shee.t.net/....................................................................28
2.21. GPIO ..............................................................................................................................................29
2.21.1. GPIO Pin mapping and shared functions .........................................................................29
2.21.2. Digital Microphone/GPIO Selection .................................................................................29
2.21.3. Digital Microphone/GPIO Selection .................................................................................29
2.22. HD Audio HDA015-B support ........................................................................................................29
2.23. Digital Core Voltage Regulator ......................................................................................................30
2.24. Aux Audio Support .........................................................................................................................31
2.24.1. General conditions in Aux Audio Mode: ...........................................................................31
2.24.2. Entering Aux Audio Mode ................................................................................................32
2.24.3. “Playback Path” Port Behavior (AnaIog I/O) ....................................................................33
2.24.4. When Port E presence detect = 0 ....................................................................................33
2.24.5. When Port E presence detect = 1 ....................................................................................33
2.24.6. SYSTEM DIAGRAMS (Analog I/O) ..................................................................................34
2.24.7. EAPD ...............................................................................................................................35
2.24.8. Analog PC_Beep .............................................................................................................35
2.24.9. Class-D BTL Issues .........................................................................................................35
2.24.10. Firmware/Software Requirements: .................................................................................35
2.25. Microphone Mute Input ..................................................................................................................36
3. CHARACTERISTICS ............................................................................................................... 37
3.1. Electrical Specifications ...................................................................................................................37
3.1.1. Absolute Maximum Ratings ...............................................................................................37
3.1.2. Recommended Operating Conditions ................................................................................37
3.2. 92HD99 Analog Performance Characteristics .................................................................................38
3.3. Class-D BTL Amplifier Performance ................................................................................................41
3.4. Capless Headphone Supply Characteristics ....................................................................................42
3.5. AC Timing Specs .............................................................................................................................42
3.5.1. HD Audio Bus Timing .........................................................................................................42
3.5.2. Digital Microphone Timing .................................................................................................43
IDT CONFIDENTIAL
©2009 INTEGRATED DEVICE TECHNOLOGY, INC.
3
V1.2 1/12
92HD99
Datasheet pdf - http://www.DataSheet4U.co.kr/
3Pages 92HD99
SINGLE CHIP PC AUDIO SYSTEM, CODEC+SPEAKER AMPLIFIER+CAPLESS HP+LDO
7.14.3. DAC0 (NID = 13h): OutAmpRight ..................................................................................148
7.14.4. DAC0 (NID = 13h): PwrState .........................................................................................148
7.14.5. DAC0 (NID = 13h): CnvtrID ............................................................................................149
7.14.6. DAC0 (NID = 13h): EAPDBTLLR ...................................................................................150
7.15. DAC1 (NID = 14h): WCap ............................................................................................................150
7.15.1. DAC1 (NID = 14h): Cnvtr ...............................................................................................152
7.15.2. DAC1 (NID = 14h): OutAmpLeft .....................................................................................153
7.15.3. DAC1 (NID = 14h): OutAmpRight ..................................................................................153
7.15.4. DAC1 (NID = 14h): PwrState .........................................................................................154
7.15.5. DAC1 (NID = 14h): CnvtrID ............................................................................................155
7.15.6. DAC1 (NID = 14h): EAPDBTLLR ...................................................................................155
7.16. ADC0 (NID = 15h): WCap ............................................................................................................156
7.16.1. ADC0 (NID = 15h): ConLst ............................................................................................157
7.16.2. ADC0 (NID = 15h): ConLstEntry0 ..................................................................................158
7.16.3. ADC0 (NID = 15h): Cnvtr ...............................................................................................158
7.16.4. ADC0 (NID = 15h): ProcState ........................................................................................159
7.16.5. ADC0 (NID = 15h): PwrState .........................................................................................160
7.16.6. ADC0 (NID = 15h): CnvtrID ............................................................................................161
7.17. ADC1 (NID = 1Bh): WCap ...........................................................................................................161
7.17.1. ADC1 (NID = 1Bh): ConLst ............................................................................................163
7.17.2. ADC1 (NID = 1Bh): ConLstEntry0 ..................................................................................163
7.17.3. ADC1 (NID = 1Bh): Cnvtr ...............................................................................................164
7.17.4. ADC1 (NID = 1Bh): ProcState ........................................................................................165
7.17.5. ADC1 (NID = 1Bh): PwrState .........................................................................................166
7.17.6. ADC1 (NID = 1Bh): CnvtrID ...........................................................................................167
7.18. ADC0Mux (NID = 17h): WCap .....................................................................................................168
7.18.1. ADC0Mux (NID = 17h): ConLst ......................................................................................169
7.18.2. ADC0Mux (NID = 17h): ConLstEntry4 ...........................................................................170
7.18.3. ADC0Mux (NID = 17h): ConLstEntry0 ...........................................................................170
7.18.4. ADC0Mux (NID = 17h): OutAmpCap .............................................................................171
7.18.5. ADC0Mux (NID = 17h): OutAmpLeft .........www..Data.Shee.t.net/.................................................................. 172
7.18.6. ADC0Mux (NID = 17h): OutAmpRight ...........................................................................172
7.18.7. ADC0Mux (NID = 17h): ConSelectCtrl ...........................................................................173
7.18.8. ADC0Mux (NID = 17h): PwrState ..................................................................................173
7.18.9. ADC0Mux (NID = 17h): EAPDBTLLR ............................................................................174
7.19. ADC1Mux (NID = 18h): WCap .....................................................................................................175
7.19.1. ADC1Mux (NID = 18h): ConLst ......................................................................................177
7.19.2. ADC1Mux (NID = 18h): ConLstEntry4 ...........................................................................177
7.19.3. ADC1Mux (NID = 18h): ConLstEntry0 ...........................................................................178
7.19.4. ADC1Mux (NID = 18h): OutAmpCap .............................................................................178
7.19.5. ADC1Mux (NID = 18h): OutAmpLeft ..............................................................................179
7.19.6. ADC1Mux (NID = 18h): OutAmpRight ...........................................................................179
7.19.7. ADC1Mux (NID = 18h): ConSelectCtrl ...........................................................................180
7.19.8. ADC1Mux (NID = 18h): PwrState ..................................................................................180
7.19.9. ADC1Mux (NID = 18h): EAPDBTLLR ............................................................................181
7.20. (NID = 19h): Vendor Reserved ....................................................................................................182
7.21. (NID = 1Ah): Vendor Reserved ....................................................................................................182
7.22. Mixer (NID = 1Bh): WCap ............................................................................................................183
7.22.1. Mixer (NID = 1Bh): InAmpCap .......................................................................................184
7.22.2. Mixer (NID = 1Bh): ConLst .............................................................................................185
7.22.3. Mixer (NID = 1Bh): ConLstEntry4 ..................................................................................185
7.22.4. Mixer (NID = 1Bh): ConLstEntry0 ..................................................................................186
7.22.5. Mixer (NID = 1Bh): InAmpLeft0 ......................................................................................186
7.22.6. Mixer (NID = 1Bh): InAmpRight0 ...................................................................................187
7.22.7. Mixer (NID = 1Bh): InAmpLeft1 ......................................................................................187
7.22.8. Mixer (NID = 1Bh): InAmpRight1 ...................................................................................188
7.22.9. Mixer (NID = 1Bh): InAmpLeft2 ......................................................................................188
7.22.10. Mixer (NID = 1Bh): InAmpRight2 .................................................................................189
7.22.11. Mixer (NID = 1Bh): InAmpLeft3 ....................................................................................189
IDT CONFIDENTIAL
©2009 INTEGRATED DEVICE TECHNOLOGY, INC.
6
V1.2 1/12
92HD99
Datasheet pdf - http://www.DataSheet4U.co.kr/
6 Page | |||
ページ | 合計 : 30 ページ | ||
|
PDF ダウンロード | [ 92HD99 データシート.PDF ] |
データシートを活用すると、その部品の主な機能と仕様を詳しく理解できます。 ピン構成、電気的特性、動作パラメータ、性能を確認してください。 |
部品番号 | 部品説明 | メーカ |
92HD90 | SINGLE CHIP PC AUDIO SYSTEM | IDT |
92HD91 | SINGLE CHIP PC AUDIO SYSTEM | IDT |
92HD92 | SINGLE CHIP PC AUDIO SYSTEM | IDT |
92HD93 | SINGLE CHIP PC AUDIO SYSTEM | IDT |