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2N5115 データシート PDF ( 特性, スペック, ピン接続図 )

部品番号 2N5115
部品説明 P-Channel JFET Switch
メーカ Calogic LLC
ロゴ Calogic  LLC ロゴ 

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2N5115 Datasheet, 2N5115 PDF,ピン配置, 機能
P-Channel JFET Switch
CORPORATION
2N5114 – 2N5116
GENERAL DESCRIPTION
Ideal for inverting switching or "Virtual Gnd" switching into
inverting input of Op. Amp. No driver is required and ±10VAC
signals can be handled using only +5V logic (TTL or CMOS).
FEATURES
Low ON Resistance
ID(off)<500pA
•• Switches directly from TTL Logic
PIN CONFIGURATION
TO-18
ABSOLUTE MAXIMUM RATINGS
(TA = 25oC unless otherwise noted)
Gate-Drain or Gate-Source Voltage . . . . . . . . . . . . . . . . . 30V
Gate Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50mA
Storage Temperature Range . . . . . . . . . . . . . -65oC to +200oC
Operating Temperature Range . . . . . . . . . . . -55oC to +200oC
Lead Temperature (Soldering, 10sec) . . . . . . . . . . . . . +300oC
Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . 500mW
Derate above 25oC . . . . . . . . . . . . . . . . . . . . . . . . 3mW/oC
NOTE: Stresses above those listed under "Absolute Maximum
Ratings" may cause permanent damage to the device. These are
stress ratings only and functional operation of the device at these or
any other conditions above those indicated in the operational sections
of the specifications is not implied. Exposure to absolute maximum
rating conditions for extended periods may affect device reliability.
ORDERING INFORMATION
Part Package
Temperature Range
2N5114-16 Hermetic TO-18
-55oC to +200oC
X2N5114-16 Sorted Chips in Carriers -55oC to +200oC
5508
D
G,C
S
SWITCHING CHARACTERISTICS (TA = 25oC unless otherwise specified)
SYMBOL
PARAMETER
td Turn-ON Delay Time
2N5114
MAX
6
2N5115
MAX
10
tr Rise Time (Note 2)
10 20
toff Turn-OFF Delay Time (Note 2)
6
8
tf Fall Time (Note 2)
15 30
2N5116
MAX
12
30
10
50
UNITS
ns
ELECTRICAL CHARACTERISTICS (TA = 25oC unless otherwise specified)
SYMBOL
PARAMETER
BVGSS
Gate-Source Breakdown Voltage
2N5114
MIN MAX
30
2N5115
MIN MAX
30
IGSS Gate Reverse Current
500 500
1.0 1.0
-500
-500
ID(off)
Drain Cutoff Current
-1.0 -1.0
VP
Gate-Source Pinch-Off Voltage
5
10
3
6
2N5116
MIN MAX
30
500
1.0
-500
-1.0
14
UNITS TEST CONDITIONS
V IG = 1µA, VDS = 0
pA VGS = 20V, VDS = 0
µA TA 150oC
pA VDS = -15V
VGS = 12V (2N5114)
µA VGS = 7V (2N5115)
VGS = 5V (2N5116)
V VDS = -15V, ID = -1nA

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