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PDF PIC32MX110F016B Data sheet ( Hoja de datos )
| Número de pieza | PIC32MX110F016B | |
| Descripción | (PIC32MX1XX / PIC32MX2XX) 32-bit Microcontrollers | |
| Fabricantes | Microchip | |
| Logotipo |  |
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PIC32MX1XX/2XX
32-bit Microcontrollers (up to 128 KB Flash and 32 KB SRAM) with
Audio and Graphics Interfaces, USB, and Advanced Analog
Operating Conditions
• 2.3V to 3.6V, -40ºC to +105ºC, DC to 40 MHz
Core: 40 MHz MIPS32® M4K®
• MIPS16e® mode for up to 40% smaller code size
• 1.56 DMIPS/MHz (Dhrystone 2.1) performance
• Code-efficient (C and Assembly) architecture
• Single-cycle (MAC) 32x16 and two-cycle 32x32 multiply
Clock Management
• 0.9% internal oscillator
• Programmable PLLs and oscillator clock sources
• Fail-Safe Clock Monitor (FSCM)
• Independent Watchdog Timer
• Fast wake-up and start-up
Power Management
• Low-power management modes (Sleep, Idle)
• Integrated Power-on Reset and Brown-out Reset
• 0.5 mA/MHz dynamic current (typical)
• 20 μA IPD current (typical)
Audio Interface Features
• Data communication: I2S, LJ, RJ, DSP modes
• Control interface: SPI and I2C™
• Master clock:
- Generation of fractional clock frequencies
- Can be synchronized with USB clock
- Can be tuned in run-time
Advanced Analog Features
• ADC Module:
- 10-bit 1.1 Msps rate with one S&H
- Up to 10 analog inputs on 28-pin devices and 13
analog inputs on 44-pin devices
• Flexible and independent ADC trigger sources
• Charge Time Measurement Unit (CTMU):
- Supports mTouch™ capacitive touch sensing
- Provides high-resolution time measurement (1 ns)
- On-chip temperature measurement capability
• Comparators:
- Up to three Analog Comparator modules
- Programmable references with 32 voltage points
Timers/Output Compare/Input Capture
• Five General Purpose Timers:
- Five 16-bit and up to two 32-bit Timers/Counters
• Five Output Compare (OC) modules
• Five Input Capture (IC) modules
• Peripheral Pin Select (PPS) to allow function remap
• Real-Time Clock and Calendar (RTCC) module
Communication Interfaces
• USB 2.0-compliant Full-speed OTG controller
• Two UART modules (10 Mbps)
- Supports LIN 2.0 protocols and IrDA® support
• Two 4-wire SPI modules (20 Mbps)
• Two I2C modules (up to 1 Mbaud) with SMBus support
• Peripheral Pin Select (PPS) to allow function remap
• Parallel Master Port (PMP)
Direct Memory Access (DMA)
• Four channels of hardware DMA with automatic data
size detection
• Two additional channels dedicated for USB
• Programmable Cyclic Redundancy Check (CRC)
www.DataSheet.co.kr
Input/Output
• 15 mA source/sink on all I/O pins
• 5V-tolerant pins
• Selectable open drain, pull-ups, and pull-downs
• External interrupts on all I/O pins
Qualification and Class B Support
• AEC-Q100 REVG (Grade 2 -40ºC to +105ºC) planned
• Class B Safety Library, IEC 60730
Debugger Development Support
• In-circuit and in-application programming
• 4-wire MIPS® Enhanced JTAG interface
• Unlimited program and six complex data breakpoints
• IEEE 1149.2-compatible (JTAG) boundary scan
Packages
Type
SOIC
SSOP
SPDIP
Pin Count
28
28
28
I/O Pins (up to)
21
21
21
Contact/Lead Pitch
1.27
0.65
0.100''
Dimensions 17.90x7.50x2.65 10.2x5.3x2 1.365x.285x.135''
Note: All dimensions are in millimeters (mm) unless specified.
QFN
28
21
0.65
6x6x0.9
44
34
0.65
8x8x0.9
VTLA
36
25
0.50
5x5x0.9
44
34
0.50
6x6x0.9
TQFP
44
34
0.80
10x10x1
© 2011-2012 Microchip Technology Inc.
Preliminary
DS61168D-page 1
Datasheet pdf - http://www.DataSheet4U.net/
1 page  
Pin Diagrams (Continued)
28-Pin QFN(1,2,3)
PIC32MX1XX/2XX
= Pins are up to 5V tolerant
PGED1/AN2/C1IND/C2INB/C3IND/RPB0/RB0
PGEC1/AN3/C1INC/C2INA/RPB1/CTED12/RB1
AN4/C1INB/C2IND/RPB2/SDA2/CTED13/RB2
AN5/C1INA/C2INC/RTCC/RPB3/SCL2/RB3
VSS
OSC1/CLKI/RPA2/RA2
OSC2/CLKO/RPA3/PMA0/RA3
1 21
2 20
3 PIC32MX110F016B 19
4 PIC32MX120F032B 18
5
PIC32MX130F064B
PIC32MX150F128Bwww.DataSheet.co.kr
17
6 16
7 15
AN11/RPB13/CTPLS/PMRD/RB13
AN12/PMD0/RB12
PGEC2/TMS/RPB11/PMD1/RB11
PGED2/RPB10/CTED11/PMD2/RB10
VCAP
VSS
TDO/RPB9/SDA1/CTED4/PMD3/RB9
Note 1:
2:
3:
The RPn pins can be used by remappable peripherals. See Table 1 for the available peripherals and Section 11.3 “Peripheral
Pin Select” for restrictions.
Every I/O port pin (RAx-RCx) can be used as a change notification pin (CNAx-CNCx). See Section 11.0 “I/O Ports” for more
information.
The metal plane at the bottom of the device is not connected to any pins and is recommended to be connected to VSS externally.
© 2011-2012 Microchip Technology Inc.
Preliminary
DS61168D-page 5
Datasheet pdf - http://www.DataSheet4U.net/
5 Page 
Pin Diagrams (Continued)
44-Pin TQFP(1,2,3)
PIC32MX1XX/2XX
= Pins are up to 5V tolerant
RPB9/SDA1/CTED4/PMD3/RB9
RPC6/PMA1/RC6
RPC7/PMA0/RC7
RPC8/PMA5/RC8
RPC9/CTED7/PMA6/RC9
VSS
VCAP
PGED2/RPB10/CTED11/PMD2/RB10
PGEC2/RPB11/PMD1/RB11
AN12/PMD0/RB12
AN11/RPB13/CTPLS/PMRD/RB13
1
2
3
4
5
6
7
8
9
10
11
PIC32MX110F016D
PIC32MX120F032D
PIC32MX130F064D
PIC32MX150F128D
www.DataSheet.co.kr
33 SOSCI/RPB4/RB4
32 TDO/RPA8/PMA8/RA8
31 OSC2/CLKO/RPA3/RA3
30 OSC1/CLKI/RPA2/RA2
29 VSS
28 VDD
27 AN8/RPC2/PMA2/RC2
26 AN7/RPC1/RC1
25 AN6/RPC0/RC0
24 AN5/C1INA/C2INC/RTCC/RPB3/SCL2/RB3
23 AN4/C1INB/C2IND/RPB2/SDA2/CTED13/RB2
Note 1:
2:
3:
4:
The RPn pins can be used by remappable peripherals. See Table 1 for the available peripherals and Section 11.3 “Peripheral
Pin Select” for restrictions.
Every I/O port pin (RAx-RCx) can be used as a change notification pin (CNAx-CNCx). See Section 11.0 “I/O Ports” for more
information.
The metal plane at the bottom of the device is not connected to any pins and is recommended to be connected to VSS externally.
This pin function is available on PIC32MX130F064D and PIC32MX150F128D devices only.
© 2011-2012 Microchip Technology Inc.
Preliminary
DS61168D-page 11
Datasheet pdf - http://www.DataSheet4U.net/
11 Page | ||
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