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PDF SiM3U1x6 Data sheet ( Hoja de datos )
| Número de pieza | SiM3U1x6 | |
| Descripción | 32-Bit Precision32 USB MCU | |
| Fabricantes | Silicon Laboratories | |
| Logotipo |  |
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SiM3U1xx
High-Performance, Low-Power, 32-Bit Precision32™
USB MCU Family with up to 256 kB of Flash
32-bit ARM® Cortex™-M3 CPU
- 80 MHz maximum frequency
- Single-cycle multiplication, hardware division support
- Nested vectored interrupt control (NVIC) with 16 levels of
interrupt priority
Memory
- 32–256 kB Flash, in-system programmable
- 8–32 kB SRAM (including 4 kB retention SRAM)
- External bus interface supports up to 16 MB of external mem-
ory and a parallel LCD interface with QVGA resolution
Power Management
- Low drop-out (LDO) regulator
- Power-on reset circuit and brownout detectors
- 5-to-3.3 V voltage regulator supports up to 150 mA to drive the
device directly from USB; no off-chip regulator required
- Programmable external regulator supports up to 3.6 V,
1000 mA
- Multiple power modes supported for low power optimization
Clock Sources
- Internal oscillator with PLL: Fine frequency resolution up to
80 MHz; spread-spectrum mode for reduced EMI
- USB internal 48 MHz oscillator supports crystal-less operation
- Low power internal oscillator: 20 MHz and 2.5 MHz modes
- Low frequency internal oscillator: 16.4 kHz
- External oscillators: Crystal, RC, C, CMOS and RTC Crystal
- Flexible clock divider: Reduce frequency by up to 128x from
any clock source
128/192/256-bit Hardware AES Encryption
- Hardware-supported Electronic Codebook (ECB), Cipher-Block
Chaining (CBC) and Counter (CTR) algorithms
- All cipher operations can be performed without any firmware
intervention for a set of 4-word blocks (up to 32 kB)
16/32-bit CRC
- Hardware support for common 32-bit and 16-bit polynomials
Timers/Counters
- 2 x 32-bit or 4 x 16-bit timers with capture/compare
- 2 x 16-bit, 2-channel counters with capture/compare/PWM
- 16-bit, 6-channel counter with capture/compare/PWM and
dead-time controller with differential outputs
- 16-bit low power timer/pulse counter operational in the lowest
power mode
- 32-bit real time clock (RTC) with multiple alarms
- Watchdog timer
Current-to-Voltage Converter
- Supports up to 6 mA input range
Supply Voltage
- 2.7 to 5.5 V (regulator enabled)
- 1.8 to 3.6 V (regulator disabled)
Low Power Features
- 85 nA current mode with voltage supply monitor enabled
- 350 nA current mode with RTC (internal oscillator)
- 620 nA current mode with RTC (external oscillator)
- 10 µs wakeup (lowest power mode); 1.5 µs analog setting time
- 275 µA/MHz active current
- Clocks can be gated off from unused peripherals to save power
2 x 12-Bit Analog-to-Digital Converters
- Up to 28 input channels
- Up to 250 ksps 12-bit mode or 1 Msps 10-bit mode
- Single, simultaneous, and interleaving modes supported
- Channel sequencer enables automatic multiplexing of multiple
channels without firmware intervention
- Internal VREF or external VREF supported
2 x 10-Bit Digital-to-Analog Converters
- DMA support for waveform generation
- Four-word circular buffer to enable 12-bit mode
16-Channel Capacitance-to-Digital Converter
- Supports buttons, sliders, wheels, and capacitive proximity
- Fast conversion time; <1 µA wake-on-touch average current
Two Low-Current Comparators
- Integrated 6-bit programmable reference voltage
- 400 nA current consumption in low power mode
16-Channel DMA Controller
- Supports ADC, DAC, USB, I2C, I2S, SPI, USART, AES, EPCA,
capacitive sensing, external triggers, and timers
Up to 65 Flexible I/O
- Up to 59 contiguous GPIO with two priority crossbars providing
flexibility in pin assignments; 12 x 5 V tolerant GPIO
- Up to 6 programmable high drive capable (5–300 mA, 1.8–6 V)
I/O can drive LEDs, power MOSFETs, buzzers, etc.
Communication Interfaces
- USB 2.0-compliant full speed with 10 endpoints, 2 kB buffer,
oscillator with automatic frequency correction, and transceiver;
no external components needed
- 2 x USARTs and 2 x UARTs with IrDA and ISO7816 SmartCard
- 3 x SPIs, 2 x I2C, I2S (receive and transmit)
On-Chip Debugging
- Serial wire debug (SWD) and JTAG allow for full-speed, non-
intrusive debug
- Serial wire viewer (SWV) available in 64 / 80 / 92-pin packages
- Cortex-M3 embedded trace macrocell (ETM) in 80 / 92-pin
packages
Temperature Range: –40 to +85 °C
Package Options
- QFN options: 40-pin (6 x 6 mm), 64-pin (9 x 9 mm)
- TQFP options: 64-pin (10 x 10 mm), 80-pin (12 x 12 mm)
- LGA option: 92-pin (7 x 7 mm)
Preliminary Rev. 0.8 2/12
Copyright © 2012 by Silicon Laboratories
SiM3U1xx
This information applies to a product under development. Its characteristics and specifications are subject to change without notice.
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SiM3U1xx
1. Related Documents and Conventions
1.1. Related Documents
This data sheet accompanies several documents to provide the complete description of the SiM3U1xx device
family.
1.1.1. SiM3U1xx/SiM3C1xx Reference Manual
The Silicon Laboratories SiM3U1xx/SiM3C1xx Reference Manual provides detailed functional descriptions for the
SiM3U1xx devices.
1.1.2. Hardware Access Layer (HAL) API Description
The Silicon Laboratories Hardware Access Layer (HAL) API provides C-language functions to modify and read
each bit in the SiM3U1xx devices. This description can be found in the SiM3xxxx HAL API Reference Manual.
1.1.3. ARM Cortex-M3 Reference Manual
The ARM-specific features like the Nested Vector Interrupt Controller are described in the ARM Cortex-M3
reference documentation. The online reference manual can be found here:
http://infocenter.arm.com/help/topic/com.arm.doc.subset.cortexm.m3/index.html#cortexm3.
1.2. Conventions
The block diagrams in this document use the following formatting conventions:
Internal Module
Other Internal
Peripheral Block
External Memory
Block
Input_Pin
Internal_Input_Signal
DMA Block
Memory Block
External to MCU
Block
Functional Block
REGn_NAME / BIT_NAME
Figure 1.1. Block Diagram Conventions
Output_Pin
Internal_Output_Signal
Preliminary Rev. 0.8
5
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SiM3U1xx
Table 3.2. Power Consumption (Continued)
Parameter
Symbol
Conditions
Min Typ Max Units
Power Mode 32,3
IDD
VDD = 1.8 V, TA = 25 °C
— 175 —
µA
Power Mode 92,3—Low Power
Shutdown with VREG0 disabled,
powered through VDD and VIO
IDD
VDD = 3.0 V, TA = 25 °C
RTC Disabled,
VDD = 1.8 V, TA = 25 °C
RTC w/ 16.4 kHz LFO,
VDD = 1.8 V, TA = 25 °C
— 250 —
— 85 —
— 350 —
µA
nA
nA
RTC w/ 32.768 kHz Crystal, — 620 —
nA
VDD = 1.8 V, TA = 25 °C
RTC Disabled,
VDD = 3.0 V, TA = 25 °C
— 145 —
nA
RTC w/ 16.4 kHz LFO,
VDD = 3.0 V, TA = 25 °C
— 500 —
nA
RTC w/ 32.768 kHz Crystal, — 800 —
nA
VDD = 3.0 V, TA = 25 °C
Power Mode 92,3—Low Power
IVREGIN
RTC Disabled,
— 300 —
nA
Shutdown with VREG0 in low-
VREGIN = 5 V, TA = 25 °C
power mode, VDD and VIO pow-
ered through VREG0 (Includes
RTC w/ 16.4 kHz LFO,
— 650 —
nA
VREG0 current)
VREGIN = 5 V, TA = 25 °C
RTC w/ 32.768 kHz Crystal, — 950 —
nA
VREGIN = 5 V, TA = 25 °C
VIOHD Current (High-drive I/O dis- IVIOHD
abled)
HV Mode (default)
LV Mode
— 2.5 5 µA
— 2 — nA
Notes:
1. Perhipheral currents drop to zero when peripheral clock and peripheral are disabled, unless otherwise noted.
2. Currents are additive. For example, where IDD is specified and the mode is not mutually exclusive, enabling the
functions increases supply current by the specified amount.
3. Includes all peripherals that cannot have clocks gated in the Clock Control module.
4. Includes supply current from internal regulator and PLL0OSC (>48 MHz), USB0OSC (48 MHz) or LPOSC0 (<48 MHz).
5. Flash execution numbers use 2 wait states for 80 MHz, 1 wait state for 48 MHz, and 0 wait states at 20 MHz or less.
6. RAM execution numbers use 0 wait states for all frequencies.
7. IDAC output current and IVC input current not included.
8. Bias current only. Does not include dynamic current from oscillator running at speed.
Preliminary Rev. 0.8
11
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