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RTL8169 の電気的特性と機能

RTL8169のメーカーはRealtek Semiconductorです、この部品の機能は「GIGABIT ETHERNET MEDIA ACCESS CONTROLLER」です。


製品の詳細 ( Datasheet PDF )

部品番号 RTL8169
部品説明 GIGABIT ETHERNET MEDIA ACCESS CONTROLLER
メーカ Realtek Semiconductor
ロゴ Realtek Semiconductor ロゴ 




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RTL8169 Datasheet, RTL8169 PDF,ピン配置, 機能
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RTL8169
REALTEK GIGABIT
ETHERNET MEDIA ACCESS
CONTROLLER
WITH POWER MANAGEMENT
RTL8169
1. Features........................................................................ 2
2. General Description .................................................... 3
3. Block Diagram............................................................. 4
4. Pin Assignments .......................................................... 5
5. Pin Description ............................................................ 6
5.1 Power Management/Isolation Interface ................. 6
5.2 PCI Interface .......................................................... 7
5.3 FLASH/BootPROM/EEPROM/MII Interface ....... 9
5.4 LED Interface....................................................... 10
5.5 GMII, TBI, PHY CP ............................................ 10
5.6 Clock and NC Pins............................................... 12
5.7 Power Pins ........................................................... 12
6. Register Descriptions ................................................ 13
6.1 DTCCR: Dump Tally Counter Command............ 15
6.2 FLASH: Flash Memory Read/Write .................... 16
6.3 ERSR: Early Rx Status......................................... 16
6.4 Command ............................................................. 17
6.5 TPPoll: Transmit Priority Polling......................... 17
6.6 Interrupt Mask...................................................... 18
6.7 Interrupt Status..................................................... 19
6.8 Transmit Configuration ........................................ 20
6.9 Receive Configuration ......................................... 21
6.10 9346CR: 93C46 (93C56) Command.................. 23
6.11 CONFIG 0.......................................................... 23
6.12 CONFIG 1.......................................................... 24
6.13 CONFIG 2.......................................................... 25
6.14 CONFIG 3.......................................................... 25
6.15 CONFIG 4.......................................................... 26
6.16 CONFIG 5.......................................................... 27
6.17 Multiple Interrupt Select .................................... 28
6.18 PHYAR: PHY Access ........................................ 28
6.19 TBICSR: Ten Bit Interface Control and Status .. 28
6.20 TBI_ANAR: TBI Auto-Negotiation Advertisement .. 29
6.21 TBI_LPAR:TBIAuto-NegotiationLinkPartnerAbility....... 29
6.22 PHYStatus: PHY(GMII or TBI) Status.............. 30
6.23 RMS: Receive (Rx) Packet Maximum Size ....... 30
6.24 C+CR: C+ Command......................................... 31
6.25 RDSAR: Receive Descriptor Start Address ....... 31
6.26 ETThR: Early Transmit Threshold..................... 31
6.27 Function Event ................................................... 32
6.28 Function Event Mask ......................................... 32
6.29 Function Preset State.......................................... 33
6.30 Function Force Event ......................................... 33
7. EEPROM (93C46 or 93C56) Contents ................... 34
7.1 EEPROM Registers.............................................. 35
7.2 EEPROM Power Management Registers............. 35
8. PCI Configuration Space Registers......................... 36
8.1 PCI Bus Interface ................................................. 36
8.1.1 Byte Ordering ............................................... 36
8.1.2 Interrupt Control........................................... 36
8.1.3 Latency Timer............................................... 36
8.1.4 64-Bit Data Operation .................................. 37
8.1.5 64-Bit Addressing......................................... 37
8.2 Bus Operation ...................................................... 37
8.2.1 Target Read................................................... 37
8.2.2 Target Write.................................................. 38
8.2.3 Master Read.................................................. 38
8.2.4 Master Write................................................. 39
8.2.5 Configuration Access ................................... 40
8.3 Packet Buffering .................................................. 40
8.3.1 Transmit Buffer Manager ............................. 40
8.3.2 Receive Buffer Manager............................... 40
8.3.3 Packet Recognition....................................... 40
8.4 PCI Configuration Space Table............................ 41
8.5 PCI Configuration Space Functions..................... 42
8.6 Default Value After Power-on (RSTB Asserted) . 46
8.7 Power Management functions.............................. 47
8.8 Vital Product Data (VPD) .................................... 49
9. Functional Description ............................................. 50
9.1 Transmit & Receive Operations........................... 50
9.1.1 Transmit........................................................ 50
9.1.2 Receive ......................................................... 55
9.2 Loopback Operation............................................. 58
9.3 Collision............................................................... 58
9.4 Flow Control ........................................................ 58
9.4.1. Control Frame Transmission ....................... 58
9.4.2. Control Frame Reception ............................ 58
9.5 Memory Functions ............................................... 59
9.5.1 Memory Read Line (MRL) .......................... 59
9.5.2 Memory Read Multiple (MRM) ................... 59
9.5.3 Memory Write and Invalidate (MWI) .......... 60
9.5.4 Dual Address Cycle (DAC).......................... 60
9.6 LED Functions ..................................................... 61
9.6.1 Link Monitor ................................................ 61
9.6.2 Rx LED ........................................................ 61
9.6.3 Tx LED......................................................... 62
9.6.4 Tx/Rx LED ................................................... 62
9.6.5 LINK/ACT LED........................................... 63
9.7 Physical Layer Interfaces ..................................... 64
9.7.1 Media Independent Interface (MII) .............. 64
9.7.2 Gigabit Media Independent Interface (GMII) ...... 64
9.7.3 Ten Bit Interface (TBI)................................. 64
9.7.4 MII/GMII Management Interface................. 64
10. Application Diagrams............................................. 65
10.1 10/100/1000Base-T Application ........................ 65
10.2 1000Base-X Application.................................... 65
11. Electrical Characteristics ....................................... 66
11.1 Temperature Limit Ratings................................. 66
11.2 DC Characteristics ............................................. 66
11.3 AC Characteristics ............................................. 67
11.3.1 FLASH/BOOT ROM Timing..................... 67
11.3.2 Serial EEPROM Interface Timing .............. 69
11.3.3 PCI Bus Operation Timing ......................... 70
11.3.4 MII Timing ................................................. 87
11.3.5 GMII Timing .............................................. 89
11.3.6 TBI Timing ................................................. 90
12. Mechanical Dimensions .......................................... 91
2002/03/27
1
Rev.1.21
Datasheet pdf - http://www.DataSheet4U.net/

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2. General Description
RTL8169
The Realtek RTL8169 is a highly integrated, high performance PCI Gigabit Ethernet Media Access Controller for use in network
adapters for servers and personal computers. The RTL8169 fully implements the 33/66MHz, 32/64-bit PCI v2.2 bus interface for
host communications with power management and is compliant with the IEEE 802.3 specification for 10/100Mbps Ethernet and
the IEEE 802.3z specification for 1000Mbps Ethernet. The RTL8169 supports the auxiliary power auto-detect function, and will
auto-configure related bits of the PCI power management registers in PCI configuration space.
It also supports the Advanced Configuration Power management Interface (ACPI), PCI power management for modern
operating systems that are capable of Operating System directed Power Management (OSPM) to achieve the most efficient
power management system possible.
In addition to the ACPI feature, the RTL8169 also supports remote wake-up (including AMD Magic Packet, LinkChg, and
Microsoft® wake-up frame) in both ACPI and APM environments. The RTL8169 is capable of performing an internal reset
through the application of auxiliary power. When the auxiliary power is applied and the main power remains off, the RTL8169 is
ready and waiting for the Magic Packet or Link Change to wake the system up. Also, the LWAKE pin provides four different
output signals including active high, active low, positive pulse, and negative pulse. The versatility of the RTL8169 LWAKE pin
provides motherboards with Wake-On-LAN (WOL) functionality.
The PCI specification is inherently little-endian. The RTL8169 contains the ability to do little-endian to big-endian swaps. It is
also possible that the RTL8169 can be used as a basis for a RISC CPU platform which expect the data to be in a big-endian
format. This feature allows for maximum flexibility.
PCI Vital Product Data (VPD) is also supported to provide the information that uniquely identifies hardware (i.e., the RTL8169
LAN card). The information may consist of part number, serial number, and other detailed information.
The RTL8169 is fully compliant to Microsoft® NDIS5 (IP, TCP, UDP) Checksum and Segmentation Task-offload features, and
supports IEEE802.1Q Virtual bridged Local Area Network (VLAN). All the above RTL8169 features contribute to lowering
CPU utilization, which is a benefit in operation as a server network card. Also, the RTL8169 boosts its PCI performance by
supporting PCI Memory Read Line & Memory Read Multiple when transmitting, and Memory Write and Invalidate when
receiving. To be better qualified as a server card, the RTL8169 also supports the PCI Dual Address Cycle (DAC) command,
when the assigned buffers reside at a physical memory addresses higher than 4 Gigabytes. For QoS, CoS requirements, the
RTL8169 supports hardware high priority queues to reduce software implementation effort and significantly improve
performance.
The RTL8169 keeps network maintenance costs low and eliminates usage barriers. It is the easiest way to upgrade a network
from 10/100Mbps to 1000Mbps. It also supports full-duplex operation, making possible 2000Mbps of bandwidth at no
additional cost. For special applications, the RTL8169 also supports a TBI interface, which can be used to provide a connection
to a Fiber channel, using a Fiber transceiver.
2002/03/27
3
Rev.1.21
Datasheet pdf - http://www.DataSheet4U.net/


3Pages


RTL8169 電子部品, 半導体
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RTL8169
5. Pin Description
In order to reduce pin count, and therefore size and cost, some pins have multiple functions. In those cases, the functions are
separated with a “/” symbol. Refer to the Pin Assignment diagram for a graphical representation.
5.1 Power Management/Isolation Interface
Symbol
PMEB
(PME#)
ISOLATEB
(ISOLATE#)
Type
O/D
I
LWAKE/
CSTSCHG
O
Pin No
87
172
88
Description
Power Management Event: Open drain, active low. Used by the
RTL8169 to request a change in its current power management state
and/or to indicate that a power management event has occurred.
Isolate Pin: Active low. Used to isolate the RTL8169 from the PCI bus.
The RTL8169 does not drive its PCI outputs (excluding PME#) and
does not sample its PCI input (including RST# and PCICLK) as long as
the Isolate pin is asserted.
LAN WAKE-UP Signal (When CardB_En=0, bit2 Config3): This
signal is used to inform the motherboard to execute the wake-up
process. The motherboard must support Wake-On-LAN (WOL). There
are 4 choices of output, including active high, active low, positive pulse,
and negative pulse, that may be asserted from the LWAKE pin. Please
refer to LWACT bit in CONFIG1 register and LWPTN bit in CONFIG4
register for the setting of this output signal. The default output is an
active high signal. Once a PME event is received, the LWAKE and
PMEB assert at the same time when the LWPME (bit4, CONFIG4) is
set to 0. If the LWPME is set to 1, the LWAKE asserts only when the
PMEB asserts and the ISOLATEB is low.
CSTSCHG Signal (When CardB_En=1, bit2 Config3): This signal is
used in CardBus applications only and is used to inform the
motherboard to execute the wake-up process whenever a PME event
occurs. This is always an active high signal, and the setting of LWACT
(bit 4, Config1), LWPTN (bit2, Config4), and LWPME (bit4, Config4)
means nothing in this case.
This pin is a 3.3V signaling output pin.
2002/03/27
6
Rev.1.21
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共有リンク

Link :


部品番号部品説明メーカ
RTL8168

Integrated Gigabit Ethernet Controller

Realtek Microelectronics
Realtek Microelectronics
RTL8169

GIGABIT ETHERNET MEDIA ACCESS CONTROLLER

Realtek Semiconductor
Realtek Semiconductor
RTL8169S-32

Single-chip Gigabit Nic Ethernet Controller

Realtek Semiconductor
Realtek Semiconductor
RTL8169S-64

Single-chip Gigabit Nic Ethernet Controller

Realtek Semiconductor
Realtek Semiconductor


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