|
|
74HCT132AのメーカーはON Semiconductorです、この部品の機能は「MC74HCT132A」です。 |
部品番号 | 74HCT132A |
| |
部品説明 | MC74HCT132A | ||
メーカ | ON Semiconductor | ||
ロゴ | |||
このページの下部にプレビューと74HCT132Aダウンロード(pdfファイル)リンクがあります。 Total 9 pages
www.DataSheet4U.net
MC74HCT132A
Quad 2-Input NAND Gate
with Schmitt-Trigger Inputs
with LSTTL Compatible
Inputs
High−Performance Silicon−Gate CMOS
The MC74HCT132A is identical in pinout to the LS132. The device
inputs are compatible with standard CMOS outputs; with pull−up
resistors, they are compatible with LSTTL outputs.
The MC74HCT132A can be used to enhance noise immunity or to
square up slowly changing waveforms.
Features
• Output Drive Capability: 10 LSTTL Loads
• Outputs Directly Interface to CMOS, NMOS, and TTL
• Operating Voltage Range: 2.0 to 6.0 V
• Low Input Current: 1.0 mA
• High Noise Immunity Characteristic of CMOS Devices
• In Compliance with the Requirements as Defined by JEDEC
Standard No. 7A
• Chip Complexity: 72 FETs or 18 Equivalent Gates
• These are Pb−Free Devices
A1
B1
Y1
A2
B2
Y2
GND
1
2
3
4
5
6
7
14 VCC
13 B4
12 A4
11 Y4
10 B3
9 A3
8 Y3
Figure 1. Pin Assignment
© Semiconductor Components Industries, LLC, 2009
November, 2009 − Rev. 1
1
http://onsemi.com
MARKING
DIAGRAMS
14
PDIP−14
N SUFFIX
CASE 646
MC74HCT132AN
AWLYYWWG
1
14
SOIC−14
D SUFFIX
CASE 751A
1
HCT132AG
AWLYWW
TSSOP−14
DT SUFFIX
CASE 948G
14
HCT
132A
ALYWG
G
1
14
SOEIAJ−14
F SUFFIX
CASE 965
1
74HCT132A
ALYWG
A = Assembly Location
L, WL = Wafer Lot
Y, YY = Year
W, WW = Work Week
G or G = Pb−Free Package
(Note: Microdot may be in either location)
FUNCTION TABLE
Inputs
AB
LL
LH
HL
HH
Output
Y
H
H
H
L
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 2 of this data sheet.
Publication Order Number:
MC74HCT132A/D
1 Page www.DataSheet4U.net
MC74HCT132A
MAXIMUM RATINGS
Symbol
Parameter
Value
Unit
VCC
VIN
VOUT
IIK
IOK
IOUT
ICC
IGND
TSTG
TL
TJ
qJA
Positive DC Supply Voltage
Digital Input Voltage
DC Output Voltage
Input Diode Current
Output Diode Current
DC Output Current, per Pin
DC Supply Current, VCC and GND Pins
DC Ground Current per Ground Pin
Storage Temperature Range
Lead Temperature, 1 mm from Case for 10 Seconds
Junction Temperature Under Bias
Thermal Resistance
Output in 3−State
High or Low State
14−PDIP
14−SOIC
14−TSSOP
*0.5 to )7.0
*0.5 to )7.0
*0.5 to )7.0
*0.5 to VCC )0.5
*20
$20
$25
$75
$75
*65 to )150
260
)150
78
125
170
V
V
V
mA
mA
mA
mA
mA
_C
_C
_C
_C/W
PD Power Dissipation in Still Air at 85_C
PDIP
SOIC
TSSOP
750
500
450
mW
MSL
Moisture Sensitivity
Level 1
FR
VESD
Flammability Rating
ESD Withstand Voltage
Oxygen Index: 30% − 35%
Human Body Model (Note 1)
Machine Model (Note 2)
Charged Device Model (Note 3)
UL 94 V0 @ 0.125 in
u2000
u100
u500
V
ILatch−Up
Latch−Up Performance
Above VCC and Below GND at 85_C (Note 4)
$300
mA
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the
Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect
device reliability.
1. Tested to EIA/JESD22−A114−A.
2. Tested to EIA/JESD22−A115−A.
3. Tested to JESD22−C101−A.
4. Tested to EIA/JESD78.
RECOMMENDED OPERATING CONDITIONS
Symbol
Parameter
Min Max
VCC
VIN, VOUT
TA
tr, tf
DC Supply Voltage (Referenced to GND)
DC Input Voltage, Output Voltage (Referenced to GND)
Operating Temperature, All Package Types
Input Rise and Fall Time (Figure 3)
2.0
0
*55
−
6.0
VCC
)125
No Limit
(Note 5)
5. When VIN X 0.5 VCC, ICC >> quiescent current.
6. Unused inputs may not be left open. All inputs must be tied to a high−logic voltage level or a low−logic input voltage level.
Unit
V
V
_C
ns
http://onsemi.com
3
3Pages www.DataSheet4U.net
MC74HCT132A
PACKAGE DIMENSIONS
PDIP−14
CASE 646−06
ISSUE P
14
1
N
−T−
SEATING
PLANE
H
A
F
G
8
B
7
C
K
D 14 PL
0.13 (0.005) M
J
L
M
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
3. DIMENSION L TO CENTER OF LEADS WHEN
FORMED PARALLEL.
4. DIMENSION B DOES NOT INCLUDE MOLD FLASH.
5. ROUNDED CORNERS OPTIONAL.
INCHES
MILLIMETERS
DIM MIN MAX MIN MAX
A 0.715 0.770 18.16 19.56
B 0.240 0.260 6.10 6.60
C 0.145 0.185 3.69 4.69
D 0.015 0.021 0.38 0.53
F 0.040 0.070 1.02 1.78
G 0.100 BSC
2.54 BSC
H 0.052 0.095 1.32 2.41
J 0.008 0.015 0.20 0.38
K 0.115 0.135 2.92 3.43
L 0.290 0.310 7.37 7.87
M −−− 10 _ −−−
N 0.015 0.039 0.38
10 _
1.01
http://onsemi.com
6
6 Page | |||
ページ | 合計 : 9 ページ | ||
|
PDF ダウンロード | [ 74HCT132A データシート.PDF ] |
データシートを活用すると、その部品の主な機能と仕様を詳しく理解できます。 ピン構成、電気的特性、動作パラメータ、性能を確認してください。 |
部品番号 | 部品説明 | メーカ |
74HCT132 | Quad 2-input NAND Schmitt trigger | Philips |
74HCT132 | Quad 2-input NAND Schmitt trigger | NXP Semiconductors |
74HCT132A | MC74HCT132A | ON Semiconductor |