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PDF HD64F3048F Data sheet ( Hoja de datos )
| Número de pieza | HD64F3048F | |
| Descripción | 16-Bit Single-Chip Microcomputer | |
| Fabricantes | Renesas Technology | |
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REJ09B0259-0700
The revision list can be viewed directly by
clicking the title page.
The revision list summarizes the locations of
revisions and additions. Details should always
be checked by referring to the relevant text.
16
H8/3048 Group, H8/3048 F-ZTAT
Hardware Manual
Renesas 16-Bit Single-Chip Microcomputer
H8 Family/H8/300H Series
H8/3048
H8/3047
H8/3045
H8/3044
H8/3048F
HD6473048,
HD6433048
HD6433047
HD6433045
HD6433044
HD64F3048
Rev.www.DataSheet4U.net 7.00
Revision Date: Sep 21, 2005
1 page  
Comparison of H8/3048 Group Product Specifications
There are seven members of the H8/3048 Group; the H8/3048F-ZTAT (H8/3048F*1, H8/3048F-
ONE*2), H8/3048ZTAT, H8/3048 mask ROM version, H8/3047 mask ROM version, H8/3045
mask ROM version, and H8/3044 mask ROM version.
The specifications of each model is compared below.
Notes: 1. H8/3048F has dual power supply with flash memory installed.
2. H8/3048F-ONE has single power supply with flash memory and E10T installed.
Refer to the H8/3048F-ONE Hardware Manual (revision 1) for details.
Hardware
Manual
H8/3048 Group
H8/3048F-ONE
ROM Type
ZTAT
Mask ROM
F-ZTAT
Model Type
H8/3048
H8/3048 mask ROM version H8/3048F
H8/3047 mask ROM version
H8/3045 mask ROM version
H8/3044 mask ROM version
H8/3048F-ONE
Model Spec
PROM model Mask ROM model
Dual power supply,
flash memory is
installed
Single power supply,
flash memory installed,
internal step-down,
high-speed operation
model
Refer to 1.4,
Differences between
H8/3048F and
H8/3048F-ONE.
Refer to 1.4.3,
Differences between
H8/3048F and
H8/3048F-ONE.
Model Type No. HD6473048
HD6433048
HD6433047
HD6433045
HD6433044
HD64F3048
HD64F3048B
Pin Assignment
Refer to figure 1.2, Pin Arrangement of H8/3048ZTAT, H8/3048
Mask ROM Version, H8/3047 Mask ROM Version, H8/3045 Mask
ROM Version, H8/3044 Mask ROM Version, and H8/3048F
(FP-100B or TFP-100B, Top View), in section 1.
5-V operation models
have a VCL pin and an
external capacitor must
be connected.
Refer to figure 1.3,
H8/3048F-ONE Pin
Arrangement (FP-100B
or TFP-100B, Top
View), in section 1.
RAM Capacity 4 kbytes
H8/3048: 4 kbytes
H8/3047: 4 kbytes
H8/3045: 2 kbytes
H8/3044: 2 kbytes
4 kbytes
4 kbytes
Rev. 7.00 Sep 21, 2005 page v of xxiv
5 Page 
Contents
Section 1 Overview...........................................................................................................
1.1 Overview...........................................................................................................................
1.2 Block Diagram ..................................................................................................................
1.3 Pin Description..................................................................................................................
1.3.1 Pin Arrangement ..................................................................................................
1.3.2 Pin Assignments in Each Mode ...........................................................................
1.3.3 Pin Functions .......................................................................................................
1.4 Differences between H8/3048F and H8/3048F-ONE .......................................................
1
1
7
8
8
10
15
20
Section 2 CPU ....................................................................................................................
2.1 Overview...........................................................................................................................
2.1.1 Features ................................................................................................................
2.1.2 Differences from H8/300 CPU ............................................................................
2.2 CPU Operating Modes ......................................................................................................
2.3 Address Space ...................................................................................................................
2.4 Register Configuration ......................................................................................................
2.4.1 Overview..............................................................................................................
2.4.2 General Registers .................................................................................................
2.4.3 Control Registers .................................................................................................
2.4.4 Initial CPU Register Values .................................................................................
2.5 Data Formats .....................................................................................................................
2.5.1 General Register Data Formats ............................................................................
2.5.2 Memory Data Formats .........................................................................................
2.6 Instruction Set ...................................................................................................................
2.6.1 Instruction Set Overview......................................................................................
2.6.2 Instructions and Addressing Modes .....................................................................
2.6.3 Tables of Instructions Classified by Function......................................................
2.6.4 Basic Instruction Formats ....................................................................................
2.6.5 Notes on Use of Bit Manipulation Instructions....................................................
2.7 Addressing Modes and Effective Address Calculation .....................................................
2.7.1 Addressing Modes ...............................................................................................
2.7.2 Effective Address Calculation..............................................................................
2.8 Processing States...............................................................................................................
2.8.1 Overview..............................................................................................................
2.8.2 Program Execution State......................................................................................
2.8.3 Exception-Handling State ....................................................................................
2.8.4 Exception-Handling Sequences ...........................................................................
25
25
25
26
27
28
29
29
30
31
32
33
33
35
36
36
37
38
47
48
50
50
52
56
56
57
57
59
Rev. 7.00 Sep 21, 2005 page xi of xxiv
11 Page | ||
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| PDF Descargar | [ Datasheet HD64F3048F.PDF ] | |
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