PDF IS42S32400A Data sheet ( Hoja de datos )

Número de pieza	IS42S32400A
Descripción	128-MBIT SYNCHRONOUS DRAM
Fabricantes	Integrated Circuit Solution
Logotipo
Hay una vista previa y un enlace de descarga de IS42S32400A (archivo pdf) en la parte inferior de esta página. Total 30 Páginas
No Preview Available ! IS42S81600A, IS42LS81600A IS42S16800A, IS42LS16800A IS42S32400A, IS42LS32400A 16Meg x 8, 8Meg x16 & 4Meg x 32 128-MBIT SYNCHRONOUS DRAM ISSI® ADVANCED INFORMATION AUGUST 2002 FEATURES • Clock frequency: 133 100, MHz • Fully synchronous; all signals referenced to a positive clock edge • Internal bank for hiding row access/precharge • Power supply IS42LS81600A VDD VDDQ 2.5V 1.8V (2.5V tolerant) IS42LS16800A 2.5V 1.8V (2.5V tolerant) IS42LS32400A IS42S81600A 2.5V 1.8V (2.5V tolerant) 3.3V 3.3V IS42S16800A 3.3V 3.3V IS42S32400A 3.3V 3.3V • LVTTL interface • Programmable burst length – (1, 2, 4, 8, full page) • Programmable burst sequence: Sequential/Interleave • Extended Mode Register • Programmable Power Reduction Feature by partial array activation during Self-Refresh • Auto Refresh (CBR) • Temp. Compensated Self Refresh. • Self Refresh with programmable refresh periods • 4096 refresh cycles every 64 ms • Random column address every clock cycle • Programmable CAS latency (2, 3 clocks) • Burst read/write and burst read/single write operations capability • Burst termination by burst stop and precharge command • Industrial Temperature Availability OVERVIEW ISSI's 128Mb Synchronous DRAM achieves high-speed data transfer using pipeline architecture. All inputs and outputs signals refer to the rising edge of the clock input.The 128Mb SDARM is organized as follows. IS42LS81600A IS42S81600A 4M x8x4 Banks 54pin TSOPII IS42LS16800A IS42S16800A 2M x16x4 Banks 54ball FBGA 54 pin TSOPII IS42LS32400A IS42S32400A 2M x16x4 Banks 90ball FBGA 86pin TSOPII KEY TIMING PARAMETERS Parameter Clk Cycle Time CAS Latency = 3 CAS Latency = 2 Clk Frequency CAS Latency = 3 CAS Latency = 2 Access Time from Clock CAS Latency = 3 CAS Latency = 2 Row to Column Delay Time (tRCD) Row Precharge Tim (tRP) -7 -10 Unit 7 10 ns 10 10 ns 133 100 Mhz 100 100 Mhz 5.4 7 ns 6 9 ns 15 18 ns 15 18 ns Copyright © 2002 Integrated Silicon Solution, Inc. All rights reserved. ISSI reserves the right to make changes to this specification and its products at any time without notice. ISSI assumes no liability arising out of the application or use of any information, products or services described herein. Customers are advised to obtain the latest version of this device specification before relying on any published information and before placing orders for products. Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774 www.DAaDtaVSAhNeCeEt4DUIN.nFeOtRMATION,Rev. 00A 08/01/02 1 1 page IS42S81600A, IS42S16800A, IS42S32400A IS42LS81600A, IS42LS16800A, IS42LS32400A PIN CONFIGURATIONS 54 pin TSOP - Type II for x16 VDD I/O0 VDDQ I/O1 I/O2 VSSQ I/O3 I/O4 VDDQ I/O5 I/O6 VSSQ I/O7 VDD LDQM WE CAS RAS CS BA0 BA1 A10 A0 A1 A2 A3 VDD 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 54 VSS 53 I/O15 52 VSSQ 51 I/O14 50 I/O13 49 VDDQ 48 I/O12 47 I/O11 46 VSSQ 45 I/O10 44 I/O9 43 VDDQ 42 I/O8 41 VSS 40 NC 39 UDQM 38 CLK 37 CKE 36 NC 35 A11 34 A9 33 A8 32 A7 31 A6 30 A5 29 A4 28 VSS ISSI ® PIN DESCRIPTIONS A0-A11 A0-A8, A10 BA0, BA1 I/O0 to I/O15 CLK CKE CS RAS CAS Row Address Input Column Address Input Bank Select Address Data I/O System Clock Input Clock Enable Chip Select Row Address Strobe Command Column Address Strobe Command WE LDQM UDQM VDD Vss VDDQ VssQ NC Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774 ADVANCEDINFORMATION Rev. 00A 06/01/02 Write Enable x16 Lower Bye, Input/Output Mask x16 Upper Bye, Input/Output Mask Power Ground Power Supply for I/O Pin Ground for I/O Pin No Connection 5 5 Page IS42S81600A, IS42S16800A, IS42S32400A IS42LS81600A, IS42LS16800A, IS42LS32400A ISSI ® COMMAND TRUTH TABLE Function Symbol Device deselect No operation H Burst stop Read Read with auto precharge Write Write with auto precharge Bank activate Precharge select bank Precharge all banks Mode register set Extended mode reg set CKE n–1 H × H H H H H H H H H H n × L H × × × × × × × × × A11 CS RAS CAS WE BA1 BA0 A10 A9 - A0 H × × × ×× ×× H H H× ×× L H HL ×× ×× L H L HVV L V L H L HVV HV L H L L VV L V L H L L VV HV L L HHV VVV L L HL VV L × L L HL ×× H× L L L L LL LV L L L L HL L V Note: H=VIH, L=VIL x= VIH or VIL, V = Valid Data. DQM TRUTH TABLE Function Symbol Data write / output enable Data mask / output disable Upper byte write enable / output enable Lower byte write enable / output enable Upper byte write inhibit / output disable Lower byte write inhibit / output disable CKE n-1 H H H H H H n × × × × × × Note: H=VIH, L=VIL x= VIH or VIL, V = Valid Data. DQM U L H L × H × L L H × L × H Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774 ADVANCEDINFORMATION Rev. 00A 06/01/02 11 11 Page

Páginas	Total 30 Páginas
PDF Descargar	[ Datasheet IS42S32400A.PDF ]

Hoja de datos destacado

Número de pieza	Descripción	Fabricantes
IS42S32400A	16Meg x 8/ 8Meg x16 & 4Meg x 32 128-MBIT SYNCHRONOUS DRAM	Integrated Silicon Solution Inc
IS42S32400A	128-MBIT SYNCHRONOUS DRAM	Integrated Circuit Solution
IS42S32400A-10T	16Meg x 8/ 8Meg x16 & 4Meg x 32 128-MBIT SYNCHRONOUS DRAM	Integrated Silicon Solution Inc
IS42S32400A-10TI	16Meg x 8/ 8Meg x16 & 4Meg x 32 128-MBIT SYNCHRONOUS DRAM	Integrated Silicon Solution Inc

Número de pieza	Descripción	Fabricantes
SLA6805M	High Voltage 3 phase Motor Driver IC.	Sanken
SDC1742	12- and 14-Bit Hybrid Synchro / Resolver-to-Digital Converters.	Analog Devices

DataSheet.es es una pagina web que funciona como un repositorio de manuales o hoja de datos de muchos de los productos más populares,
permitiéndote verlos en linea o descargarlos en PDF.

DataSheet.es | 2020 | Privacy Policy | Contacto | Buscar