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ADP2126 の電気的特性と機能

ADP2126のメーカーはAnalog Devicesです、この部品の機能は「(ADP2126 / ADP2127) DC-to-DC Converters」です。


製品の詳細 ( Datasheet PDF )

部品番号 ADP2126
部品説明 (ADP2126 / ADP2127) DC-to-DC Converters
メーカ Analog Devices
ロゴ Analog Devices ロゴ 




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ADP2126 Datasheet, ADP2126 PDF,ピン配置, 機能
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Ultralow Profile, 500 mA, 6 MHz, Synchronous,
Step-Down, DC-to-DC Converters
ADP2126/ADP2127
FEATURES
1.20 V and 1.26 V fixed output voltage options
Clock signal enable
Logic signal enable also available on certain models
6 MHz operating frequency
Spread spectrum frequency modulation to reduce EMI
500 mA continuous output current
Input voltage: 2.1 V to 5.5 V
0.3 μA (typical) shutdown supply current
Pin-selectable power-saving mode
Compatible with tiny multilayer inductors
Internal synchronous rectifier
Internal compensation
Internal soft start
Output-to-ground short-circuit protection
Current-limit protection
Undervoltage lockout
Thermal shutdown protection
0.330 mm height (maximum), 6-ball BUMPED_CHIP (ADP2126)
0.200 mm height (maximum), 6-pad EWLP (ADP2127)
APPLICATIONS
Mobile phones
Digital still/video cameras
Digital audio
Portable equipment
Camera modules
Image stabilization systems
GENERAL DESCRIPTION
The ADP2126/ADP2127 are high frequency, step-down, dc-to-
dc converters optimized for portable applications in which board
area and battery life are critical constraints. The fixed 6 MHz
operating frequency enables the use of tiny ceramic inductors
and capacitors and the regulators use spread spectrum frequency
modulation to reduce EMI. Additionally, synchronous rectification
improves efficiency and results in fewer external components.
At high load currents, the ADP2126/ADP2127 use a voltage
regulating pulse-width modulation (PWM) mode that maintains
a constant frequency with excellent stability and transient response.
Light load operation is determined by the state of the MODE pin.
In forced PWM mode, the converter continues operating in PWM
for light loads. Under light load conditions in auto mode, the
ADP2126/ADP2127 automatically enter a power-saving mode,
which uses pulse frequency modulation (PFM) to reduce the
effective switching frequency, thus ensuring the longest battery
life in portable applications.
Rev. A
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners.
TYPICAL APPLICATION CIRCUITS
INPUT
VOLTAGE
2.1V TO 5.5V
CIN
2.2µF
ADP2126
L
1.0µH
A2 VIN
SW B1
C2 GND
FB C1
OUTPUT
VOLTAGE
1.20V OR 1.26V
COUT
2.2µF
EXTCLK MODE
B2 A1
PWM
AUTO
OFF ON
OR
ON *
OFF
*LOGIC HIGH ENABLE IS ONLY AVAILABLE ON CERTAIN MODELS.
Figure 1. ADP2126 0.33 mm Maximum Height Solution
INPUT
VOLTAGE
2.1V TO 5.5V
CIN
2 × 1µF
ADP2127
L
0.56µH
A2 VIN
SW B1
C2 GND
FB C1
EXTCLK MODE
B2 A1
PWM
AUTO
OUTPUT
VOLTAGE
1.20V OR 1.26V
COUT
2 × 1µF
OFF ON
OR
ON *
OFF
*LOGIC HIGH ENABLE IS ONLY AVAILABLE ON CERTAIN MODELS.
Figure 2. ADP2127 0.22 mm Maximum Height Solution
The ADP2126/ADP2127 are enabled by a 6 MHz to 27 MHz
external clock signal applied to the EXTCLK pin. Certain models
can also be enabled with a logic high signal. When the external clock
is not switching and in a low logic state, the ADP2126/ADP2127
stop regulating and shut down to draw less than 0.3 μA (typical)
from the source.
The ADP2126/ADP2127 have an input voltage range of 2.1 V to
5.5 V, allowing the use of single Li+/Li polymer cell, three-cell
alkaline, NiMH cell, and other standard power sources. The
ADP2126/ADP2127 are internally compensated to minimize
external components and can source up to 500 mA. Other key
features, such as cycle-by-cycle peak current limit, soft start,
undervoltage lockout (UVLO), output-to-ground short-circuit
protection, and thermal shutdown provide protection for internal
and external circuit components.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
www.analog.com
Fax: 781.461.3113
©2011 Analog Devices, Inc. All rights reserved.

1 Page





ADP2126 pdf, ピン配列
ADP2126/ADP2127
SPECIFICATIONS
VIN = 3.6 V, TA = 25°C for typical specifications, and TA = TJ = −40°C to +85°C for minimum and maximum specifications, unless
otherwise noted. All specifications at temperature extremes are guaranteed via correlation using the standard statistical quality control
(SQC) methods. Typical specifications are not guaranteed.
Table 1.
Parameter
SUPPLY
Operating Input Voltage Range
PWM Mode Quiescent Current
Auto Mode Quiescent Current
Shutdown Current1
UNDERVOLTAGE LOCKOUT
Rising VIN Threshold
Falling VIN Threshold
OUTPUT
Continuous Output Current2
PWM Mode Output Accuracy3
PFM Mode Output Accuracy3, 4
FB Bias Current
FB Pull-Down Resistance
SWITCHING CHARACTERISTICS
PMOS On Resistance
NMOS On Resistance
SW Leakage Current
PMOS Switch Current Limit
PFM Current Limit
Oscillator Frequency
SHORT-CIRCUIT PROTECTION
Rising VOUT Threshold
Falling VOUT Threshold
EXTCLK INPUT
High Threshold Voltage
Low Threshold Voltage
Leakage Current
Duty Cycle Operating Range
Frequency Operating Range
MODE INPUT LOGIC
High Threshold Voltage
Low Threshold Voltage
Leakage Current
THERMAL SHUTDOWN5
Thermal Shutdown Threshold
Thermal Shutdown Hysteresis
Symbol Test Conditions/Comments
VIN
No load, VMODE = VIN
No load, VMODE = 0 V, VFB > VOUT, SW = open
VEXTCLK = 0 V, open loop
ILOAD
VOUT
RDSCHG
fSW
VIN = 2.1 V to 5.5 V
VIN = 2.1 V to 5.5 V, no load
VIN = 2.1 V to 5.5 V
VFB = VOUT
VEXTCLK = 0 V, IFB = 10 mA
ISW = 500 mA
ISW = 500 mA
VSW = 0 V, VIN = 5.5 V
Open loop
VMODE = 0 V, VIN = 3.6 V
VEXTCLK(H)
VEXTCLK(L)
DEXTCLK
fEXTCLK
VIN = 2.1 V to 5.5 V
VIN = 2. 1 V to 5.5 V
VIN = 5.5 V, VEXTCLK = 2.1 V to 5.5 V
VMODE(H)
VMODE(L)
VIN = 2.1 V to 5.5 V
VIN = 2.1 V to 5.5 V
VEXTCLK = 0 V, VIN = VMODE = 5.5 V
PWM mode only
Min Typ Max Unit
2.1 5.5 V
12 mA
300 500
μA
0.3 1.5
μA
1.9 2.1
V
1.5 1.8
V
500
VOUT − 2%
VOUT − 3%
4
110
VOUT + 2%
VOUT + 3%
9
180
mA
V
V
μA
Ω
180 340
250 mΩ
10 μA
770
1000 1291
mA
170 260 305 mA
4.8 6 6.8 MHz
0.55 0.7
V
0.4 0.52
V
1.3 V
0.4 V
0.01 1
μA
40 60 %
6 27 MHz
1.3 V
0.4 V
0.005 1
μA
146 °C
13 °C
Rev. A | Page 3 of 20


3Pages


ADP2126 電子部品, 半導体
ADP2126/ADP2127
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
BALL A1
INDICATOR
12
MODE VIN
A
SW EXTCLK
B
FB GND
C
TOP VIEW
BALL/PAD SIDE DOWN
BUMPS/PADS ON OPPOSITE SIDE
(Not to Scale)
Figure 5. Pin Configuration
Table 4. Pin Function Descriptions
Pin No. Mnemonic Description
A1
MODE
Mode Select. This pin toggles between auto mode (PFM and PWM switching) and PWM mode. Set MODE low to
allow the part to operate in auto mode. Pull MODE high to force the part to operate in PWM mode. The voltage
applied to MODE should never be higher than the voltage applied to VIN. Do not leave this pin floating.
A2 VIN
Power Supply Input.
B1 SW
Switch Node.
B2
EXTCLK
External Clock Enable Signal. The ADP2126/ADP2127 power up when a clock signal (6 MHz to 27 MHz) or a logic high
signal (EXTCLK ≥ 1.3 V) is detected on this pin. (The logic high enable feature is only available on certain models.)
C1 FB
Feedback Divider Input. Connect the output capacitor from FB to GND to set the output voltage ripple and to
complete the control loop.
C2 GND
Ground.
Rev. A | Page 6 of 20

6 Page



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