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L74VHC1G125 の電気的特性と機能

L74VHC1G125のメーカーはLRCです、この部品の機能は「Noninverting 3-State Buffer」です。


製品の詳細 ( Datasheet PDF )

部品番号 L74VHC1G125
部品説明 Noninverting 3-State Buffer
メーカ LRC
ロゴ LRC ロゴ 




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L74VHC1G125 Datasheet, L74VHC1G125 PDF,ピン配置, 機能
LESHAN RADIO COMPANY, LTD.
Noninverting 3−State Buffer
L74VHC1G125
The L74VHC1G125 is an advanced high speed CMOS noninverting 3 state buffer fabricated with silicon gate
noninverting 3 state buffer fabricated with silicon gate CMOS technology. It achieves high speed operation similar to
equivalent Bipolar Schottky TTL while maintaining CMOS low power dissipation.
The internal circuit is composed of three stages, including a buffered 3-state output which provides high noise immunity
and stable output.
The L74VHC1G125 input structure provides protection when voltages up to 7.0V are applied,regardless of
the supply voltage. This allows the L74VHC1G125 to be used to interface 5.0V circuits to 3.0V circuits.
Features
High Speed: tPD = 3.5 ns (Typ) at VCC = 5.0 V
Low Power Dissipation: ICC = 1 mA (Max) at TA = 25°C
Power Down Protection Provided on Inputs
Balanced Propagation Delays
Pin and Function Compatible with Other Standard Logic Families
Chip Complexity: FETs = 58; Equivalent Gates = 15
Pb−Free Packages are Available
5
4
1
2
3
SC–88A/SOT–353/SC–70
DF SUFFIX
MARKING
DIAGRAMS
5
W0 M G
G
1
5
4
1
2
3
TSOP–5/SOT–23/SC–59
DT SUFFIX
5
W0 AYW G
G
1
OE 1
IN A 2
5 VCC
GND 3
4 OUT Y
Figure 1. Pinout (Top View)
OE EN
IN A
OUT Y
Figure 2. Logic Symbol
PIN ASSIGNMENT
1 OE
2 IN A
3 GND
4 OUT Y
5 VCC
www.DataSheet4U.com
A Input
L
H
X
FUNCTION TABLE
OE Input
Y Output
LL
LH
HZ
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 5 of this data sheet.
1/6

1 Page





L74VHC1G125 pdf, ピン配列
LESHAN RADIO COMPANY, LTD.
DC ELECTRICAL CHARACTERISTICS
L74VHC1G125
Symbol
Parameter
Test Conditions
VCC
TA = 25°C
TA 85°C −55 TA 125°C
(V) Min Typ Max Min Max Min
Max Unit
VIH Minimum High−Level
Input Voltage
2.0 1.5
3.0 2.1
4.5 3.15
5.5 3.85
1.5 1.5
2.1 2.1
3.15 3.15
3.85 3.85
V
VIL Maximum Low−Level
Input Voltage
2.0
0.5 0.5
0.5 V
3.0
0.9 0.9
0.9
4.5
1.35 1.35
1.35
5.5
1.65 1.65
1.65
VOH
Minimum High−Level
Output Voltage
VIN = VIH or VIL
VIN = VIH or VIL
IOH = −50 mA
2.0 1.9 2.0
3.0 2.9 3.0
4.5 4.4 4.5
1.9
2.9
4.4
1.9
2.9
4.4
V
VIN = VIH or VIL
IOH = −4 mA
IOH = −8 mA
3.0 2.58
4.5 3.94
2.48 2.34
3.80 3.66
V
VOL Maximum Low−Level VIN = VIH or VIL
Output Voltage
IOL = 50 mA
VIN = VIH or VIL
2.0
3.0
4.5
0.0 0.1
0.0 0.1
0.0 0.1
0.1
0.1
0.1
0.1 V
0.1
0.1
VIN = VIH or VIL
IOL = 4 mA
IOL = 8 mA
3.0
4.5
0.36 0.44
0.36 0.44
V
0.52
0.52
IOZ Maximum 3−State
Leakage Current
VIN = VIH or VIL
VOUT = VCC or GND
5.5
±0.25
$2.5
$2.5 mA
IIN Maximum Input
Leakage Current
VIN = 5.5 V or GND
0 to
5.5
±0.1 ±1.0
$1.0 mA
ICC Maximum Quiescent VIN = VCC or GND
5.5
1.0 20
40 mA
Supply Current
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎAC ELECTRICAL CHARACTERISTICS Cload = 50 pF, Input tr = tf = 3.0 ns
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎTA = 25°C
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎSymbol
Parameter
Test Conditions
Min Typ Max
Î ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎtPLH,
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎtPHL
Maximum Propagation
Delay,
Input A to Y
(Figures 3 and 4)
VCC = 3.3 ± 0.3 V CL = 15 pF
CL = 50 pF
VCC = 5.0 ± 0.5 V CL = 15 pF
CL = 50 pF
4.5 8.0
6.4 11.5
3.5 5.5
4.5 7.5
Î ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎtPZL,
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎtPZH
Maximum Output
Enable Time,
Input OE to Y
(Figures 4 and 5)
VCC = 3.3 ± 0.3 V CL = 15 pF
RL = 1000 W
CL = 50 pF
VCC = 5.0 ± 0.5 V CL = 15 pF
RL = 1000 W
CL = 50 pF
4.5 8.0
6.4 11.5
3.5 5.1
4.5 7.1
Î ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎtPLZ,
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎtPHZ
Maximum Output
Disable Time,
Input OE to Y
(Figures 4 and 5)
VCC = 3.3 ± 0.3 V CL = 15 pF
RL 1000 W
CL = 50 pF
VCC = 5.0 ± 0.5 V CL = 15 pF
RL = 1000 W
CL = 50 pF
6.5 9.7
8.0 13.2
4.8 6.8
7.0 8.8
Î ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎCIN Maximum Input
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎCapacitance
4.0 10
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎCOUT
Maximum 3−State Out-
put Capacitance (Output
in High Impedance
State)
6.0
TA 85°C
Min Max
9.5
13.0
−55 TA 125°C
Min Max
12.0
16.0
Unit
ns
6.5 8.5
8.5 10.5
9.5 11.5 ns
13.0 15.0
6.0 8.5
8.0 10.5
11.5 14.5 ns
15.0 18.0
8.0 10.0
10.0 12.0
10 10 pF
pF
Typical @ 25°C, VCC = 5.0 V
CPD Power Dissipation Capacitance (Note 5)
8.0 pF
5. CPD is defined as the value of the internal equivalent capacitance which is calculated from the operating current consumption without load.
Average operating current can be obtained by the equation: ICC(OPR) = CPD  VCC  fin + ICC. CPD is used to determine the no−load dynamic
power consumption; PD = CPD  VCC2  fin + ICC  VCC.
3/6


3Pages


L74VHC1G125 電子部品, 半導体
LESHAN RADIO COMPANY, LTD.
L74VHC1G125
PACKAGE DIMENSIONS
TSOP−5 / SOT23−5 / SC59−5
DT SUFFIX
D
54
S 1 23
L
G
A
B
0.05 (0.002)
H
C
J
KM
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. MAXIMUM LEAD THICKNESS INCLUDES
LEAD FINISH THICKNESS. MINIMUM LEAD
THICKNESS IS THE MINIMUM THICKNESS
OF BASE MATERIAL.
4. A AND B DIMENSIONS DO NOT INCLUDE
MOLD FLASH, PROTRUSIONS, OR GATE
BURRS.
MILLIMETERS
INCHES
DIM MIN MAX MIN MAX
A 2.90 3.10 0.1142 0.1220
B 1.30 1.70 0.0512 0.0669
C 0.90 1.10 0.0354 0.0433
D 0.25 0.50 0.0098 0.0197
G 0.85 1.05 0.0335 0.0413
H 0.013 0.100 0.0005 0.0040
J 0.10 0.26 0.0040 0.0102
K 0.20 0.60 0.0079 0.0236
L 1.25 1.55 0.0493 0.0610
M 0 _ 10 _ 0_ 10 _
S 2.50 3.00 0.0985 0.1181
SOLDERING FOOTPRINT*
0.95
0.037
1.9
0.074
1.0
0.039
2.4
0.094
0.7
0.028
ǒ ǓSCALE 10:1
mm
inches
6/6
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部品番号部品説明メーカ
L74VHC1G125

Noninverting 3-State Buffer

LRC
LRC


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