|
|
PDF ADP323 Data sheet ( Hoja de datos )
| Número de pieza | ADP323 | |
| Descripción | (ADP322 / ADP323) High PSRR Voltage Regulator | |
| Fabricantes | Analog Devices | |
| Logotipo |  |
|
Hay una vista previa y un enlace de descarga de ADP323 (archivo pdf) en la parte inferior de esta página. Total 24 Páginas | ||
|
No Preview Available !
FEATURES
Fixed (ADP322) and adjustable output (ADP323) options
Bias voltage range (VBIAS): 2.5 V to 5.5 V
LDO input voltage range (VIN1/VIN2, VIN3): 1.8 V to 5.5 V
Three 200 mA low dropout voltage regulators (LDOs)
16-lead, 3 mm × 3 mm LFCSP
Initial accuracy: ±1%
Stable with 1 µF ceramic output capacitors
No noise bypass capacitor required
3 independent logic controlled enables
Overcurrent and thermal protection
Key specifications
High PSRR
76 dB PSRR up to 1 kHz
70 dB PSRR at 10 kHz
60 dB PSRR at 100 kHz
40 dB PSRR at 1 MHz
Low output noise
29 µV rms typical output noise at VOUT = 1.2 V
55 µV rms typical output noise at VOUT = 2.8 V
Excellent transient response
Low dropout voltage: 110 mV at 200 mA load
85 µA typical ground current at no load, all LDOs enabled
100 µs fast turn-on circuit
Guaranteed 200 mA output current per regulator
−40°C to +125°C junction temperature
APPLICATIONS
Mobile phones
Digital cameras and audio devices
Portable and battery-powered equipment
Portable medical devices
Post dc-to-dc regulation
GENERAL DESCRIPTION
The ADP322/ADP323 200 mA triple output LDOs combine high
PSRR, low noise, low quiescent current, and low dropout voltage
to extend the battery life of portable devices and are ideally
suited for wireless applications with demanding performance
and board space requirements.
The ADP322/ADP323 PSRR is greater than 60 dB for frequencies
www.DasahtaigShheaest140U0.ckoHmz while operating with a low headroom voltage.
The ADP322/ADP323 offer much lower noise performance
than competing LDOs without the need for a noise bypass
capacitor.
Rev. 0
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibilityisassumedbyAnalogDevices for itsuse,nor foranyinfringementsofpatentsor other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners.
Triple, 200 mA, Low Noise,
High PSRR Voltage Regulator
ADP322/ADP323
TYPICAL APPLICATION CIRCUITS
2.5V TO VBIAS
5.5V
+
1µF
ADP322 VBIAS
1.8V TO VIN1/VIN2
5.5V
+
1µF ON
EN1
OFF
LDO 1
EN LD1
VBIAS
VOUT1
+
1µF
1.8V TO VIN3
5.5V
ON
EN2
OFF
+
1µF ON
EN3
OFF
LDO 2
EN LD2
VBIAS
LDO 3
EN LD3
VOUT2
+
1µF
VOUT3
+
1µF
GND
Figure 1. Typical Application Circuit for ADP322
2.5V TO VBIAS
5.5V
+
1µF
ADP323 VBIAS
1.8V TO VIN1/VIN2
5.5V
+
1µF ON
EN1
OFF
LDO 1
EN LD1
VBIAS
1.8V TO VIN3
5.5V
ON
EN2
OFF
+
1µF ON
EN3
OFF
LDO 2
EN LD2
VBIAS
LDO 3
EN LD3
VOUT1
FB1
+
1µF
VOUT2
FB2
+
1µF
VOUT3
FB3
+
1µF
GND
Figure 2. Typical Application Circuit for ADP323
The ADP322/ADP323 are available in a miniature 16-lead,
3 mm × 3 mm LFCSP package and are stable with tiny 1 µF
±30% ceramic output capacitors providing the smallest possible
board area for a wide variety of portable power needs.
The ADP322 is available in output voltage combinations ranging
from 0.8 V to 3.3 V and offers overcurrent and thermal protection
to prevent damage in adverse conditions. The APDP323
adjustable triple LDO can be configured for any output voltage
between 0.5 V and 5 V with two resistors for each output.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
www.analog.com
Fax: 781.461.3113
©2010 Analog Devices, Inc. All rights reserved.
1 page  
ABSOLUTE MAXIMUM RATINGS
Table 3.
Parameter
VIN1/VIN2, VIN3, VBIAS to GND
VOUT1, VOUT2, FB1, FB2 to GND
VOUT3, FB3 to GND
EN1, EN2, EN3 to GND
Storage Temperature Range
Operating Junction Temperature Range
Soldering Conditions
Rating
–0.3 V to +6.5 V
–0.3 V to VIN1/VIN2
–0.3 V to VIN3
–0.3 V to +6.5 V
–65°C to +150°C
–40°C to +125°C
JEDEC J-STD-020
Stresses above those listed under absolute maximum ratings
may cause permanent damage to the device. This is a stress
rating only and functional operation of the device at these or
any other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
THERMAL DATA
Absolute maximum ratings apply individually only, not in
combination.
The ADP322/ADP323 triple LDO can be damaged when the
junction temperature limits are exceeded. Monitoring ambient
temperature does not guarantee that the junction temperature
(TJ) is within the specified temperature limits. In applications
with high power dissipation and poor thermal resistance, the
maximum ambient temperature may have to be derated. In
applications with moderate power dissipation and low PCB
thermal resistance, the maximum ambient temperature can
exceed the maximum limit as long as the junction temperature
is within specification limits.
The junction temperature (TJ) of the device is dependent on the
ambient temperature (TA), the power dissipation of the device
(PD), and the junction-to-ambient thermal resistance of the
package (θJA). Maximum junction temperature (TJ) is calculated
from the ambient temperature (TA) and power dissipation (PD)
using the following formula:
TJ = TA + (PD × θJA)
ADP322/ADP323
Junction-to-ambient thermal resistance (θJA) of the package is
based on modeling and calculation using a 4-layer board. The
junction-to-ambient thermal resistance is highly dependent
on the application and board layout. In applications where high
maximum power dissipation exists, close attention to thermal
board design is required. The value of θJA may vary, depending
on PCB material, layout, and environmental conditions. The
specified values of θJA are based on a 4-layer, 4 inch × 3 inch
circuit board. See JEDEC JESD 51-9 for detailed information
on the board construction. For additional information, see the
AN-617 Application Note, MicroCSP™ Wafer Level Chip Scale
Package.
ΨJB is the junction to board thermal characterization parameter
with units of °C/W. ΨJB of the package is based on modeling and
calculation using a 4-layer board. The JESD51-12, Guidelines for
Reporting and Using Package Thermal Information, states that
thermal characterization parameters are not the same as thermal
resistances. ΨJB measures the component power flowing through
multiple thermal paths rather than a single path as in thermal
resistance, θJB. Therefore, ΨJB thermal paths include convection
from the top of the package as well as radiation from the package,
factors that make ΨJB more useful in real-world applications.
Maximum junction temperature (TJ) is calculated from the board
temperature (TB) and power dissipation (PD) using the following
formula:
TJ = TB + (PD × ΨJB)
See JEDEC JESD51-8 and JESD51-12 for more detailed inform-
ation about ΨJB.
THERMAL RESISTANCE
θJA and ΨJB are specified for the worst-case conditions, that is, a
device soldered in a circuit board for surface-mount packages.
Table 4.
Package Type
16-Lead, 3 mm × 3 mm LFCSP
θJA ΨJB Unit
49.5 25.2 °C/W
ESD CAUTION
www.DataSheet4U.com
Rev. 0 | Page 5 of 24
5 Page 
0.9
3.6
0.8
3.8
4.2
4.4
0.7 4.8
5.5
0.6
0.5
0.4
0.3
0.2
0.1
0
–50 –25
0 25 50 75
TEMPERATURE (°C)
100 125
Figure 23. Shutdown Current vs. Temperature at Various Input Voltages
100
90
80
70
60
50
40
30
20
10
0
1 10 100 1000
LOAD (mA)
Figure 24. Dropout Voltage vs. Load Current and Output Voltage,
VOUT1 = 3.3 V
3.35
3.30
3.25
LOAD = 1mA
LOAD = 5mA
LOAD = 10mA
LOAD = 50mA
LOAD = 100mA
LOAD = 200mA
3.20
3.15
3.10
3.05
3.00
2.95
3.10 3.15 3.20 3.25 3.30 3.35 3.40 3.45 3.50
VIN (V)
www.DataSheFeitg4uUre.2c5o.mOutput Voltage vs. Input Voltage (in Dropout),
VOUT1 = 3.3 V
ADP322/ADP323
350
300
250
200
150
100
LOAD = 1mA
LOAD = 5mA
50
LOAD = 10mA
LOAD = 50mA
LOAD = 100mA
LOAD = 200mA
0
3.10 3.15 3.20 3.25 3.30 3.35 3.40 3.45 3.50
VIN (V)
Figure 26. Ground Current vs. Input Voltage (in Dropout), VOUT1 = 3.3 V
300
250
200
150
100
50
0
1 10 100 1000
LOAD (mA)
Figure 27. Dropout Voltage vs. Load Current and Output Voltage,
VOUT2 = 1.8 V
1.85
1.80
1.75
1.70
1.65
1.60
LOAD = 1mA
1.55
LOAD = 5mA
LOAD = 10mA
1.50 LOAD = 50mA
LOAD = 100mA
LOAD = 200mA
1.45
1.70 1.80 1.90 2.00 2.10
VIN (V)
Figure 28. Output Voltage vs. Input Voltage (in Dropout),
VOUT2 = 1.8 V
Rev. 0 | Page 11 of 24
11 Page | ||
| Páginas | Total 24 Páginas | |
| PDF Descargar | [ Datasheet ADP323.PDF ] | |
Hoja de datos destacado
| Número de pieza | Descripción | Fabricantes |
| ADP320 | High PSRR Voltage Regulator | Analog Devices |
| ADP3203 | 2-Phase IMVP-II & IMVP-III Core Controller for Mobile CPUs | Analog Devices |
| ADP3204 | 3-Phase IMVP-II and IMVP-III Core Controller for Mobile CPUs | Analog Devices |
| ADP3204JCP | 3-Phase IMVP-II and IMVP-III Core Controller for Mobile CPUs | Analog Devices |
| Número de pieza | Descripción | Fabricantes |
| SLA6805M | High Voltage 3 phase Motor Driver IC. |
 Sanken |
| SDC1742 | 12- and 14-Bit Hybrid Synchro / Resolver-to-Digital Converters. |
Analog Devices |
|
DataSheet.es es una pagina web que funciona como un repositorio de manuales o hoja de datos de muchos de los productos más populares, |
| DataSheet.es | 2020 | Privacy Policy | Contacto | Buscar |