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PDF ISL89167 Data sheet ( Hoja de datos )

Número de pieza ISL89167
Descripción High Speed Dual Channel 6A - Power MOSFET Driver
Fabricantes Intersil 
Logotipo Intersil Logotipo



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No Preview Available ! ISL89167 Hoja de datos, Descripción, Manual

High Speed, Dual Channel, 6A, Power MOSFET Driver
With Programmable Delays
ISL89166, ISL89167, ISL89168
The ISL89166, ISL89167, and ISL89168 are high-speed, 6A,
dual channel MOSFET drivers. These parts are similar to the
ISL89160, ISL89161, ISL89162 drivers but use the NC pins for
programming the rising edge time delays of the outputs used for
dead time control.
As an alternative to using external RC circuits for time delays, the
programmable delays on the RDTA and RDTB pins allows the
user to delay the rising edge of the respective outputs just by
connecting an appropriate resistor value between these pins and
ground. The accuracy and temperature characteristics of the
time delays are specified freeing the user of the need to select
appropriate external resistors and capacitors that traditionally
are applied to the logic inputs to delay the output edges.
At high switching frequencies, these MOSFET drivers use very
little internal bias currents. Separate, non-overlapping drive
circuits are used to drive each CMOS output FET to prevent
shoot-thru currents in the output stage.
The undervoltage lockout (UV) insures that driver outputs remain
off (low) during turn-on until VDD is sufficiently high for correct
logic control. This prevents unexpected glitches when VDD is
being turn-on or turn-off.
Features
• Dual output, 6A peak current (sink and source)
• Typical ON-resistance <1Ω
• Specified Miller plateau drive currents
• Very low thermal impedance (θJC = 3°C/W)
• Hysteretic logic inputs for high noise immunity
• Programmable output rising edge delays using only a resistor.
• ~ 20ns rise and fall time driving a 10nF load.
• Low operating bias currents
Applications
• Synchronous Rectifier (SR) Driver
• Switch mode power supplies
• Motor Drives, Class D amplifiers, UPS, Inverters
• Pulse Transformer Driver
• Clock/Line Driver
RDTA
1
INA 2
GND
3
INB
4
EPAD
VDD
RDTB
8
7 OUTA
6
5 OUTB
4.7µF
FIGURE 1. TYPICAL APPLICATION
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350
300
250 +125°C (WORST CASE)
200
150
+25°C (TYPICAL)
100
50 -40°C (WORST CASE)
0
0 5 10 15
RDT (2k to 20k)
FIGURE 2. PROGRAMMABLE TIME DELAYS
20
January 14, 2011
FN7720.0
1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-468-3774 |Copyright Intersil Americas Inc. 2011. All Rights Reserved
Intersil (and design) is a trademark owned by Intersil Corporation or one of its subsidiaries.
All other trademarks mentioned are the property of their respective owners.

1 page




ISL89167 pdf
ISL89166, ISL89167, ISL89168
DC Electrical Specifications VDD = 12V, GND = 0V, No load on OUTA or OUTB, RDTA = RDTB = 0kΩ unless otherwise specified.
Boldface limits apply over the operating junction temperature range, -40°C to +125°C. (Continued)
PARAMETERS
SYMBOL
TEST CONDITIONS
TJ = +25°C
MIN TYP MAX
TJ = -40°C to +125°C
MIN
(Note 7)
MAX
(Note 7)
UNITS
Input Bias Current
for INA, INB
IIN GND<VIN<VDD
---
-10
+10 µA
OUTPUTS
High Level Output Voltage VOHA VOHB
- - - VDD - 0.1 VDD
V
Low Level Output Voltage
VOLA
VOLB
---
GND GND + 0.1 V
Peak Output Source Current
IO VO (initial) = 0V, CLOAD = 10nF
- -6 -
-
-A
Peak Output Sink Current
IO VO (initial) =12V, CLOAD = 10nF
- +6 -
-
-A
NOTES:
7. Compliance to datasheet limits is assured by one or more methods: production test, characterization and/or design.
8. This parameter is taken from the simulation models for the input FET. The actual capacitance on this input will be dominated by the PCB parasitic
capacitance.
9. A 200µs delay further inhibits the release of the output state when the UV positive going threshold is crossed.
10. The true state of a specific part number is defined by the input logic symbol.
AC Electrical Specifications VDD = 12V, GND = 0V, No Load on OUTA or OUTB, RDTA = RDTB = 0kΩ unless Otherwise
Specified. Boldface limits apply over the operating junction temperature range, -40°C to +125°C.
PARAMETERS
SYMBOL
TEST CONDITIONS
/NOTES
TJ = +25°C
MIN TYP MAX
TJ = -40°C to +125°C
MIN
(Note 7)
MAX
(Note 7)
UNITS
Output Rise Time (see Figure 4)
tR CLOAD = 10 nF,
10% to 90%
- 20 -
-
40 ns
Output Fall Time (see Figure 4)
tF CLOAD = 10 nF,
90% to 10%
- 20 -
-
40 ns
Output Rising Edge Propagation Delay (see Figure 3)
Output Falling Edge Propagation Delay (see Figure 3)
(Note 12)
tRDLY
tFDLY
RDTx = 0kΩ
RDTx = 0kΩ
- 25 -
- 25 -
-
-
50 ns
50 ns
Rising Propagation Matching (see Figure 3)
Falling Propagation Matching (see Figure 3)
Rising edge timer delay (Note 11)
tRM
tFM
tRTDLY20
RDTx = 0kΩ
RDTx = 0kΩ
RTx = 20kΩ,
No load
- <1ns -
- <1ns -
- 266 -
-
-
237
- ns
- ns
297 ns
tRTDLY2
RTx = 2.0kΩ, No
load
-
42
-
29
58 ns
Miller Plateau Sink Current
(See Test Circuit Figure 5)
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-IMP VDD = 10V,
VMILLER = 5V
-IMP VDD = 10V,
VMILLER = 3V
-IMP VDD = 10V,
VMILLER= 2V
-6-
- 4.7 -
- 3.7 -
-
-
-
-A
-A
-A
5 FN7720.0
January 14, 2011

5 Page





ISL89167 arduino
ISL89166, ISL89167, ISL89168
Revision History
The revision history provided is for informational purposes only and is believed to be accurate, but not warranted. Please go to web to make
sure you have the latest Rev.
DATE
REVISION
CHANGE
1/14/11
FN7720.0 Initial Release
Products
Intersil Corporation is a leader in the design and manufacture of high-performance analog semiconductors. The Company's products
address some of the industry's fastest growing markets, such as, flat panel displays, cell phones, handheld products, and notebooks.
Intersil's product families address power management and analog signal processing functions. Go to www.intersil.com/products for a
complete list of Intersil product families.
*For a complete listing of Applications, Related Documentation and Related Parts, please see the respective device information page
on intersil.com: ISL89166, ISL89167, ISL89168.
To report errors or suggestions for this datasheet, please go to www.intersil.com/askourstaff
FITs are available from our website at http://rel.intersil.com/reports/sear
www.DataSheet4U.com
11
FN7720.0
January 14, 2011

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