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PDF MN63112S Data sheet ( Hoja de datos )
| Número de pieza | MN63112S | |
| Descripción | 2K-Bit EEPROM | |
| Fabricantes | Panasonic Semiconductor | |
| Logotipo |  |
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EEPROMs
MN63112S
2K-Bit EEPROM
Overview
The MN63112S is a 2K-bit EEPROM supporting se-
rial I/O and operating on a single power supply with a
voltage between 1.8 and 5.5 V. It provides the following
pins for easy interfacing to microprocessors or
microcontrollers: chip select (CS), serial clock (SK), data
input (DI), and data output (DO). It includes a built-in
timer for use in automatically erasing and writing data
during data update operations.
The ORG pin provides a choice of two memory orga-
nizations: 256 × 8 bits when ORG is connected to ground
and 128 × 16 bits when ORG is connected to VCC. An
internal pull-up resistor makes the latter the default con-
figuration.
Conversion of peripheral circuits to CMOS realizes
great reductions in power consumption. Use of floating
gate memory cells and a built-in error correction circuit
ensures reliable operation for 105 write cycles.
Features
Choice of memory organizations: 256 × 8 bits and
128 × 16 bits
Floating gate memory cells
Function blocking erroneous writes
Low power consumption
- Reads: max. 6.6 mW for VCC = 3.3 V
- Standby: max. 66 µW for VCC = 3.3 V
Built-in self-timer for use in automatically erasing
and writing
Built-in error correction circuit that guarantees 105
write cycles
10-year data preservation period
Applications
Keyless entry systems, cordless telephones, storage for
recognition and adjustment data for terminals, etc.
www.DataSheet4U.com
Pin Assignment
CS 1
SK 2
DI 3
DO 4
8 VCC
7 N.C.
6 ORG
5 GND
( TOP VIEW )
SOP008-P-0225
1
1 page | ||
| Páginas | Total 4 Páginas | |
| PDF Descargar | [ Datasheet MN63112S.PDF ] | |
Hoja de datos destacado
| Número de pieza | Descripción | Fabricantes |
| MN63112S | 2K-Bit EEPROM | Panasonic Semiconductor |
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