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Número de pieza STU2NK100Z
Descripción N-channel Power MOSFET
Fabricantes STMicroelectronics 
Logotipo STMicroelectronics Logotipo



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STD2NK100Z
STP2NK100Z - STU2NK100Z
N-channel 1000 V, 6.25 , 1.85 A, TO-220, DPAK, IPAK
Zener-protected SuperMESH™ Power MOSFET
Features
Type
STD2NK100Z
STP2NK100Z
STU2NK100Z
VDSS
RDS(on)
max
ID
PTOT
1000 V
1000 V
1000 V
< 8.5
< 8.5
< 8.5
1.85 A
1.85 A
1.85 A
70 W
70 W
70 W
Extremely high dv/dt capability
100% avalanche tested
Gate charge minimized
Very low intrinsic capacitances
Very good manufacturing repeatability
Application
Switching applications
Description
The SuperMESH™ series is obtained through an
extreme optimization of ST’s well established
strip-based PowerMESH™ layout. In addition to
pushing on-resistance significantly down,
specialties is taken to ensure a very good dv/dt
capability for the most demanding application.
Such series complements ST full range of high
voltage Power MOSFETs.
3
2
1
TO-220
IPAK
3
2
1
3
1
DPAK
Figure 1. Internal schematic diagram
Table 1. Device summary
Order codes
STD2NK100Z
STP2NK100Z
STU2NK100Z
Marking
2NK100Z
2NK100Z
2NK100Z
Package
DPAK
TO-220
IPAK
Packaging
Tape and reel
Tube
Tube
June 2008
www.DataSheet.in
Rev 2
1/16
www.st.com
16

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STU2NK100Z pdf
STD2NK100Z - STP2NK100Z - STU2NK100Z
Electrical characteristics
Table 7. Switching times
Symbol
Parameter
td(on)
tr
td(off)
tr
Turn-on delay time
Rise time
Turn-off delay time
Fall time
Test conditions
VDD= 500 V, ID= 0.9 A,
RG=4.7 Ω, VGS=10 V
(see Figure 16)
Min. Typ. Max. Unit
7.2 ns
6.5 ns
41.5 ns
32.5 ns
Table 8. Source drain diode
Symbol
Parameter
Test conditions
Min. Typ. Max. Unit
ISD
ISDM (1)
Source-drain current
Source-drain current
(pulsed)
VSD (2) Forward on voltage
ISD= 1.85 A, VGS=0
trr
Qrr
IRRM
Reverse recovery time
Reverse recovery charge
Reverse recovery current
ISD= 1.85 A, di/dt= 100 A/µs,
VDD= 60 V
(see Figure 21)
trr
Qrr
IRRM
Reverse recovery time
Reverse recovery charge
Reverse recovery current
ISD= 1.85 A, di/dt= 100 A/µs,
VDD= 60 V, Tj=150 °C
(see Figure 21)
1. Pulse width limited by package
2. Pulsed: pulse duration = 300µs, duty cycle 1.5%
1.85 A
7.4 A
1.6 V
476 ns
1.6 µC
6.9 A
532 ns
1.9 µC
88 A
Table 9. Gate-source zener diode
Symbol
Parameter
Test conditions
BVGSO Gate-source breakdown
(1) voltage
IGS = ±1mA (open drain)
Min. Typ. Max. Unit
30 V
1. The built in back-to-back zener diodes have specifically been designed to enhance not only the device’s
ESD capability, but also to make them safely absorb possible voltage transients that may occasionally be
applied from gate to source. In this respect the Zener voltage is appropriate to achieve an efficient and
cost-effective intervention to protect the device’s integrity. These integrated zener diodes thus avoid the
usage of external components.
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STU2NK100Z arduino
STD2NK100Z - STP2NK100Z - STU2NK100Z
Package mechanical data
TO-220 mechanical data
mm inch
Dim
Min Typ Max Min Typ Max
A 4.40
4.60
0.173
0.181
b 0.61
0.88
0.024
0.034
b1 1.14
1.70
0.044
0.066
c 0.48
0.70
0.019
0.027
D 15.25
15.75
0.6
0.62
D1 1.27
0.050
E 10
10.40
0.393
0.409
e 2.40
2.70
0.094
0.106
e1 4.95
5.15
0.194
0.202
F 1.23
1.32
0.048
0.051
H1 6.20
6.60
0.244
0.256
J1 2.40
2.72
0.094
0.107
L 13
14 0.511
0.551
L1 3.50
3.93
0.137
0.154
L20 16.40
L30 28.90
0.645
1.137
P 3.75
Q 2.65
3.85
2.95
0.147
0.104
0.151
0.116
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