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PDF IRMCK341 Data sheet ( Hoja de datos )
| Número de pieza | IRMCK341 | |
| Descripción | Sensorless Motor Control IC | |
| Fabricantes | International Rectifier | |
| Logotipo |  |
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Data Sheet No. PD60339
IRMCK341
Sensorless Motor Control IC for Appliances
Features
MCETM (Motion Control Engine) - Hardware based
computation engine for high efficiency sinusoidal
sensorless control of permanent magnet AC motor
Supports both interior and surface permanent
magnet motors
Built-in hardware peripheral for single shunt
current feedback reconstruction
No external current or voltage sensing operational
amplifier required
Three/two-phase Space Vector PWM
Three-channel analog output (PWM)
Embedded 8-bit high speed microcontroller (8051)
for flexible I/O and man-machine control
JTAG programming port for emulation/debugger
Serial communication interface (UART)
I2C/SPI serial interface
Watchdog timer with independent analog clock
Three general purpose timers/counters
Two special timers: periodic timer, capture timer
Internal ‘One-Time Programmable’ (OTP) memory
and internal RAM for final production usage
Pin compatible with IRMCF341, RAM version
1.8V/3.3V CMOS
Product Summary
Maximum crystal frequency
60 MHz
Maximum internal clock (SYSCLK) frequency 128 MHz
Maximum 8051 clock frequency
33 MHz
Sensorless control computation time
MCETM computation data range
11 μsec typ
16 bit signed
8051 OTP Program memory
56K bytes
MCE program and Data RAM
8K bytes
GateKill latency (digital filtered)
2 μsec
PWM carrier frequency counter
16 bits/ SYSCLK
A/D input channels
8
A/D converter resolution
12 bits
A/D converter conversion speed
2 μsec
8051 instruction execution speed
2 SYSCLK
Analog output (PWM) resolution
8 bits
UART baud rate (typ)
57.6K bps
Number of I/O (max)
24
Package (lead-free)
QFP64
Operating temperature
-40°C ~ 85°C
Description
IRMCK341 is a high performance OTP based motion control IC designed primarily for appliance applications. IRMCK341 is
designed to achieve low cost and high performance control solutions for advanced inverterized appliance motor control.
IRMCK341 contains two computation engines. One is Motion Control Engine (MCETM) for sensorless control of permanent
magnet motors; the other is an 8-bit high-speed microcontroller (8051). Both computation engines are integrated into one
monolithic chip. The MCETM contains a collection of control elements such as Proportional plus Integral, Vector rotator, Angle
estimator, Multiply/Divide, Low loss SVPWM, Single Shunt IFB. The user can program a motion control algorithm by
connecting these control elements using a graphic compiler. Key components of the sensorless control algorithms, such as the
Angle Estimator, are provided as complete pre-defined control blocks implemented in hardware. A unique analog/digital circuit
and algorithm to fully support single shunt current reconstruction is also provided. The 8051 microcontroller performs 2-cycle
instruction execution (16MIPS at 33MHz). The MCE and 8051 microcontroller are connected via dual port RAM to process
signal monitoring and command input. An advanced graphic compiler for the MCETM is seamlessly integrated into the
MATLAB/Simulink environment, while third party JTAG based emulator tools are supported for 8051 developments.
IRMCK341 comes with a small QFP64 pin lead-free package.
Rev 1.0
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1 page  
IRMCK341
1 Overview
IRMCK341 is a new International Rectifier integrated circuit device primarily designed as a one-
chip solution for complete inverter controlled appliance motor control applications. Unlike a
traditional microcontroller or DSP, the IRMCK341 provides a built-in closed loop sensorless
control algorithm using the unique Motion Control Engine (MCETM) for permanent magnet motors.
The MCETM consists of a collection of control elements, motion peripherals, a dedicated motion
control sequencer and dual port RAM to map internal signal nodes. IRMCK341 also employs a
unique single shunt current reconstruction circuit to eliminate additional analog/digital circuitry and
enables a direct shunt resistor interface to the IC. Motion control programming is achieved using a
dedicated graphical compiler integrated into the MATLAB/SimulinkTM development environment.
Sequencing, user interface, host communication, and upper layer control tasks can be
implemented in the 8051 high-speed 8-bit microcontroller. The 8051 microcontroller is equipped
with a JTAG port to facilitate emulation and debugging tools. Figure 1 shows a typical application
schematic using the IRMCK341.
IRMCK341 is intended for volume production purpose and contains 64K bytes of OTP (One Time
Programming) ROM, which can be programmed through a JTAG port. For a development
purpose use, IRMCF341 contains a 48k byte of RAM in place of program OTP to facilitate an
application development work. Both IRMCF341 and IRMCK341 come in the same 64-pin QFP
package with identical pin configuration to facilitate PC board layout and transition to mass
production
Passive
EMI
Filter
Appliance Inverter
Multiple
Output
Power
Supply
1.8
V
3.3
V
IRMCK341
IRS2336D
HVIC
Motor
(PMSM)
Figure 1.
7 Analog Input
Upto 24 Digital
Input/Output
I2C Interface
to EEPROM
UART interface
to Front Panel
Typical Application Block Diagram Using IRMCK341
www.irf.com
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© 2007 International Rectifier
5
5 Page 
IRMCK341
I2C Interface
SCL/SO-SI
SDA/CS0
Output, I2C clock output, or SPI data
Input/output, I2C Data line or SPI chip select 0
I2C/SPI Interface and OTP power
SCL/SO-SI/VPP Output, I2C clock output, or SPI data or OTP programming power
SDA/CS0
Input/output, I2C data line or SPI chip select 0
P1.3/SYNC/SCK Input/output port 1.3, can be configured as SYNC output or SPI clock
output
P3.0/INT2/CS1 Input/output port 3.0, can be configured as INT2 input or SPI chip select
1
4.2 Motion Peripheral Interface Group
PWM
PWMUH
PWMUL
PWMVH
PWMVL
PWMWH
PWMWL
Output, PWM phase U high side gate signal
Output, PWM phase U low side gate signal
Output, PWM phase V high side gate signal
Output, PWM phase V low side gate signal
Output, PWM phase W high side gate signal
Output, PWM phase W low side gate signal
Fault
GATEKILL
Input, upon assertion, this negates all six PWM signals, programmable
logic sense
4.3 Analog Interface Group
AVDD
AVSS
AREF
CMEXT
IFB+
IFB-
IFBO
AIN0
AIN1
AIN2
AIN3
AIN4
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Analog power (1.8V)
Analog power return
0.6V buffered output
Unbuffered 0.6V, input to the AREF buffer, capacitor needs to be
connected.
Input, Operational amplifier positive input for shunt resistor current
sensing
Input, Operational amplifier negative input for shunt resistor current
sensing
Output, Operational amplifier output for shunt resistor current sensing
Input, Analog input channel 0 (0 – 1.2V), typically configured for DC bus
voltage input
Input, Analog input channel 1 (0 – 1.2V), needs to be pulled down to
AVSS if unused
Input, Analog input channel 2 (0 – 1.2V), needs to be pulled down to
AVSS if unused
Input, Analog input channel 3 (0 – 1.2V), needs to be pulled down to
AVSS if unused
Input, Analog input channel 4 (0 – 1.2V), needs to be pulled down to
AVSS if unused
© 2007 International Rectifier
11
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