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PDF IRMCK312 Data sheet ( Hoja de datos )
| Número de pieza | IRMCK312 | |
| Descripción | Dual Channel Sensorless Motor Control IC | |
| Fabricantes | International Rectifier | |
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Data Sheet No. PD60338
IRMCK312
Dual Channel Sensorless Motor Control IC for
Appliances
Features
MCETM (Motion Control Engine) - Hardware based
computation engine for high efficiency sinusoidal
sensorless control of permanent magnet AC motor
Integrated Power Factor Correction control
Supports both interior and surface permanent
magnet motors
Built-in hardware peripheral for single shunt
current feedback reconstruction
No external current or voltage sensing operational
amplifier required
Dual channel three/two-phase Space Vector PWM
Three-channel analog output (PWM)
Embedded 8-bit high speed microcontroller (8051)
for flexible I/O and man-machine control
JTAG programming port for emulation/debugger
Two serial communication interface (UART)
I2C/SPI serial interface
Watchdog timer with independent analog clock
Three general purpose timers/counters
Two special timers: periodic timer, capture timer
Internal ‘One-Time Programmable’ (OTP) memory
and internal RAM for final production usage
Pin compatible with IRMCF312 RAM version
1.8V/3.3V CMOS
Product Summary
Maximum crystal frequency
60 MHz
Maximum internal clock (SYSCLK) frequency 128 MHz
Maximum 8051 clock frequency
33 MHz
Sensorless control computation time
MCETM computation data range
11 μsec typ
16 bit signed
8051 OTP Program memory
56K bytes
MCE program and Data RAM
8K bytes
GateKill latency (digital filtered)
2 μsec
PWM carrier frequency counter
16 bits/ SYSCLK
A/D input channels
11
A/D converter resolution
12 bits
A/D converter conversion speed
2 μsec
8051 instruction execution speed
2 SYSCLK
Analog output (PWM) resolution
8 bits
UART baud rate (typ)
57.6K bps
Number of I/O (max)
36
Package (lead-free)
QFP100
Operating temperature
-40°C ~ 85°C
Description
IRMCK312 is a high performance OTP based motion control IC designed primarily for appliance applications. IRMCK312 is
designed to achieve low cost and high performance control solutions for advanced inverterized appliance motor control.
IRMCK312 contains two computation engines. One is Motion Control Engine (MCETM) for sensorless control of permanent
magnet motors; the other is an 8-bit high-speed microcontroller (8051). Both computation engines are integrated into one
monolithic chip. The MCETM contains a collection of control elements such as Proportional plus Integral, Vector rotator, Angle
estimator, Multiply/Divide, Low loss SVPWM, Single Shunt IFB. The user can program a motion control algorithm by
connecting these control elements using a graphic compiler. Key components of the sensorless control algorithms, such as
the Angle Estimator, are provided as complete pre-defined control blocks implemented in hardware. A unique analog/digital
circuit and algorithm to fully support single shunt current reconstruction is also provided. The 8051 microcontroller performs 2-
cycle instruction execution (16MIPS at 33MHz). The MCE and 8051 microcontroller are connected via dual port RAM to
process signal monitoring and command input. An advanced graphic compiler for the MCETM is seamlessly integrated into the
MATLAB/Simulink environment, while third party JTAG based emulator tools are supported for 8051 developments.
IRMCK312 comes with a small QFP100 pin lead-free package.
Rev 1.0
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1 page  
IRMCK312
1 Overview
IRMCK312 is a new International Rectifier integrated circuit device primarily designed as a one-
chip solution for complete inverter controlled appliance dual motor control applications. Unlike a
traditional microcontroller or DSP, the IRMCK312 provides a built-in closed loop sensorless
control algorithm using the unique Motion Control Engine (MCETM) for permanent magnet motors.
The MCETM consists of a collection of control elements, motion peripherals, a dedicated motion
control sequencer and dual port RAM to map internal signal nodes. IRMCK312 also employs a
unique single shunt current reconstruction circuit to eliminate additional analog/digital circuitry and
enables a direct shunt resistor interface to the IC. The sensorless control is the same for both
motors with a single shunt current sensing capability. Motion control programming is achieved
using a dedicated graphical compiler integrated into the MATLAB/SimulinkTM development
environment. Sequencing, user interface, host communication, and upper layer control tasks can
be implemented in the 8051 high-speed 8-bit microcontroller. The 8051 microcontroller is
equipped with a JTAG port to facilitate emulation and debugging tools. Figure 1 shows a typical
application schematic using IRMCK312.
IRMCK312 is intended for volume production purpose and contains 64K bytes of OTP (One Time
Programming) ROM, which can be programmed through a JTAG port. For a development
purpose use, IRMCF312 contains a 48k byte of RAM in place of program OTP to facilitate an
application development work. Both IRMCF312 and IRMCK312 come in the same 100-pin QFP
package with identical pin configuration to facilitate PC board layout and transition to mass
production
Figure 1. Typical Application Block Diagram Using IRMCK312
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5 © 2007 International Rectifier
5 Page 
IRMCK312
Crystal Interface
XTAL0
XTAL1
Input, connected to crystal
Output, connected to crystal
Reset Interface
RESET
Inout, system reset, needs to be pulled up to VDD1 but doesn’t require
external RC time constant
I2C/SPI Interface
SCL/SO-SI/VPP Output, I2C clock output, SPI SO-SI
SDA/CS0
Input/output, I2C Data line, Chip Select 0 of SPI
P3.0/INT2/CS1 Input/output port 3.0, can be configured as external interrupt 2 or SPI
chip select 1
P1.3/SYNC/SCK Input/output port 1.3, can be configured as SYNC output or SPI clock
4.2 Motion Peripheral Interface Group
PWM
CPWMUH
CPWMUL
CPWMVH
CPWMVL
CPWMWH
CPWMWL
FPWMUH
FPWMUL
FPWMVH
FPWMVL
FPWMWH
FPWMWL
PFCPWM
Output, motor 1 PWM phase U high side gate signal
Output, motor 1 PWM phase U low side gate signal
Output, motor 1 PWM phase V high side gate signal
Output, motor 1 PWM phase V low side gate signal
Output, motor 1 PWM phase W high side gate signal
Output, motor 1 PWM phase W low side gate signal
Output, motor 2 PWM phase U high side gate signal
Output, motor 2 PWM phase U low side gate signal
Output, motor 2 PWM phase V high side gate signal
Output, motor 2 PWM phase V low side gate signal
Output, motor 2 PWM phase W high side gate signal
Output, motor 2 PWM phase W low side gate signal
Output, PFC PWM
Fault
CGATEKILL
P5.0/PFCGKILL
FGATEKILL
Input, upon assertion, this negates all six PWM signals for motor 1,
programmable logic sense
Input, upon assertion, this negates PFCPWM signal, programmable logic
sense, can be configured as discrete I/O in which case CGATEKILL
negates PFCPWM
Input, upon assertion, this negates all six PWM signals for motor 2,
programmable logic sense
4.3 Analog Interface Group
AVDD
AVSS
AREF
CMEXT
Analog power (1.8V)
Analog power return
Buffered 0.6V output
Unbuffered 0.6V, input to the AREF buffer, capacitor needs to be
connected.
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