DataSheet.jp

9602 の電気的特性と機能

9602のメーカーはNational Semiconductorです、この部品の機能は「Dual Retriggerable/ Resettable One Shots」です。


製品の詳細 ( Datasheet PDF )

部品番号 9602
部品説明 Dual Retriggerable/ Resettable One Shots
メーカ National Semiconductor
ロゴ National Semiconductor ロゴ 




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9602 Datasheet, 9602 PDF,ピン配置, 機能
DataSheet.in
June 1989
9602 DM9602 Dual Retriggerable
Resettable One Shots
General Description
These dual resettable retriggerable one shots have two in-
puts per function one which is active high and one which is
active low This allows the designer to employ either lead-
ing-edge or trailing-edge triggering which is independent of
input transition times When input conditions for triggering
are met a new cycle starts and the external capacitor is
allowed to rapidly discharge and then charge again The
retriggerable feature permits output pulse widths to be ex-
tended In fact a continuous true output can be maintained
by having an input cycle time which is shorter than the out-
put cycle time The output pulse may then be terminated at
any time by applying a low logic level to the RESET pin
Retriggering may be inhibited by either connecting the Q
output to an active high input or the Q output to an active
low input
Features
Y 70 ns to % output width range
Y Resettable and retriggerable 0% to 100% duty cycle
Y TTL input gating leading or trailing edge triggering
Y Complementary TTL outputs
Y Optional retrigger lock-out capability
Y Pulse width compensated for VCC and temperature
variations
Y Alternate Military Aerospace device (54xxx) is available
Contact a National Semiconductor Sales Office Distrib-
utor for specifications
Connection Diagram
Dual-In-Line Package
Order Number 9602DMQB 9602FMQB or DM9602N
See NS Package Number J16A N16E or W16A
Function Table
Pin No’s
AB
HxL
H
X
L
LxH
X
H e High Voltage Level
L e Low Voltage Level
X e Don’t Care
CLR
H
H
L
Operation
Trigger
Trigger
Reset
C1995 National Semiconductor Corporation TL F 6611
TL F 6611 – 1
RRD-B30M105 Printed in U S A

1 Page





9602 pdf, ピン配列
DataSheet.in
Switching Characteristics VCC e 5V TA e 25 C (See Section 1 for Test Waveforms and Output Load)
Symbol
Parameter
Conditions
Military
Min Max
Commercial
Min Max
Units
tPLH Propagation Delay Time Negative Trigger Input
Low-to-High Level Output to True Output
35 40 ns
tPHL
Propagation Delay Time
High-to-Low Level Output
tPW(MIN) Minimum True Output
Pulse Width
Minimum Complement
Pulse Width
Negative Trigger Input
To Complement Output
CL e 15 pF
CX e 0
RX e 5 kX
43 48 ns
90 100
ns
100 110
tPW Pulse Width
CSTRAY Maximum Allowable Wiring
Capacitance
RX e 10 kX
CX e 1000 pF
3 08
3 76
3 08
3 76
Pins 2 14 to
GND
50
50
ms
pF
RX External Timing Resistor
5 25 5 50 kX
Logic Diagrams
TL F 6611 – 2
Operating Rules
1 An external resistor (RX) and external capacitor (CX) are
required as shown in the Logic Diagram
2 The value of CX may vary from 0 to any necessary value
available If however the capacitor has leakages ap-
proaching 3 0 mA or if stray capacitance from either ter-
minal to ground is more than 50 pF the timing equations
may not represent the pulse width obtained
3 The output pulse with (t) is defined as follows
(1
t e K RXCX
1a
RX
for CX l 103 pF
K 0 34
where
RX is in kX CX is in pF
t is in ns
for CX k 103 pF see Figure 1
for K vs CX see Figure 6
TL F 6611 – 3
4 If electrolytic type capacitors are to be used the following
three configurations are recommended
A Use with low leakage capacitors
The normal RC configuration can be used predictably
only if the forward capacitor leakage at 5 0V is less
than 3 mA and the inverse capacitor leakage at 1 0V is
less than 5 mA over the operational temperature
range
R k 0 6 RX (Max)
TL F 6611 – 4
3


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9602 電子部品, 半導体
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共有リンク

Link :


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