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ADG5412 の電気的特性と機能

ADG5412のメーカーはAnalog Devicesです、この部品の機能は「(ADG5412 / ADG5413) Quad SPST Switches」です。


製品の詳細 ( Datasheet PDF )

部品番号 ADG5412
部品説明 (ADG5412 / ADG5413) Quad SPST Switches
メーカ Analog Devices
ロゴ Analog Devices ロゴ 




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ADG5412 Datasheet, ADG5412 PDF,ピン配置, 機能
DataSheet.in
FEATURES
Latch-up proof
8 kV human body model (HBM) ESD rating
Low on resistance (<10 Ω)
±9 V to ±22 V dual-supply operation
9 V to 40 V single-supply operation
48 V supply maximum ratings
Fully specified at ±15 V, ±20 V, +12 V, and +36 V
VSS to VDD analog signal range
APPLICATIONS
Relay replacement
Automatic test equipment
Data acquisition
Instrumentation
Avionics
Audio and video switching
Communication systems
GENERAL DESCRIPTION
The ADG5412/ADG5413 contain four independent single-
pole/single-throw (SPST) switches. The ADG5412 switches
turn on with Logic 1. The ADG5413 has two switches with
digital control logic similar to that of the ADG5412; however,
the logic is inverted on the other two switches. Each switch
conducts equally well in both directions when on, and each
switch has an input signal range that extends to the supplies.
In the off condition, signal levels up to the supplies are blocked.
The ADG5412 and ADG5413 do not have a VL pin. The digital
inputs are compatible with 3 V logic inputs over the full
operating supply range.
The on-resistance profile is very flat over the full analog input
range, which ensures good linearity and low distortion when
switching audio signals. High switching speed also makes the
devices suitable for video signal switching. The ADG5413
High Voltage Latch-Up Proof,
Quad SPST Switches
ADG5412/ADG5413
FUNCTIONAL BLOCK DIAGRAMS
S1
IN1
D1
IN2
ADG5412
IN3
S2
D2
S3
D3
S4
IN4
D4
S1
IN1
D1
IN2
ADG5413
IN3
S2
D2
S3
D3
S4
IN4
D4
SWITCHES SHOWN FOR A LOGIC 1 INPUT.
Figure 1.
exhibits break-before-make switching action for use in
multiplexer applications.
PRODUCT HIGHLIGHTS
1. Trench isolation guards against latch-up. A dielectric trench
separates the P and N channel transistors thereby preventing
latch-up even under severe overvoltage conditions.
2. Low RON.
3. Dual-supply operation. For applications where the analog
signal is bipolar, the ADG5412/ADG5413 can be operated
from dual supplies up to ±22 V.
4. Single-supply operation. For applications where the analog
signal is unipolar, the ADG5412/ADG5413 can be operated
from a single rail power supply up to 40 V.
5. 3 V logic compatible digital inputs: VINH = 2.0 V, VINL = 0.8 V.
6. No VL logic power supply required.
Rev. 0
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
www.analog.com
Fax: 781.461.3113
©2010 Analog Devices, Inc. All rights reserved.

1 Page





ADG5412 pdf, ピン配列
DataSheet.in
ADG5412/ADG5413
SPECIFICATIONS
±15 V DUAL SUPPLY
VDD = +15 V ± 10%, VSS = −15 V ± 10%, GND = 0 V, unless otherwise noted.
Table 1.
Parameter
ANALOG SWITCH
Analog Signal Range
On Resistance, RON
25°C −40°C to +85°C −40°C to +125°C Unit
VDD to VSS
V
9.8 Ω typ
On-Resistance Match Between Channels,
∆RON
On-Resistance Flatness, RFLAT (ON)
LEAKAGE CURRENTS
Source Off Leakage, IS (Off )
11 14
0.35
0.7 0.9
1.2
1.6 2
±0.05
16
1.1
2.2
Ω max
Ω typ
Ω max
Ω typ
Ω max
nA typ
Drain Off Leakage, ID (Off )
±0.25 ±0.75
±0.05
±3.5
nA max
nA typ
Channel On Leakage, ID (On), IS (On)
DIGITAL INPUTS
Input High Voltage, VINH
Input Low Voltage, VINL
Input Current, IINL or IINH
Digital Input Capacitance, CIN
DYNAMIC CHARACTERISTICS1
tON
tOFF
Break-Before-Make Time Delay, tD
(ADG5413 Only)
Charge Injection, QINJ
±0.25 ±0.75
±0.1
±0.4 ±2
0.002
2.5
170
202 236
120
145 170
15
240
±3.5
±12
2.0
0.8
±0.1
262
182
6
nA max
nA typ
nA max
V min
V max
μA typ
μA max
pF typ
ns typ
ns max
ns typ
ns max
ns typ
ns min
pC typ
Off Isolation
−78
dB typ
Channel-to-Channel Crosstalk
−70
dB typ
Total Harmonic Distortion + Noise
0.009
% typ
−3 dB Bandwidth
167
MHz typ
Insertion Loss
−0.7
dB typ
CS (Off )
CD (Off )
CD (On), CS (On)
18
18
60
pF typ
pF typ
pF typ
Rev. 0 | Page 3 of 20
Test Conditions/Comments
VS = ±10 V, IS = −10 mA;
see Figure 24
VDD = +13.5 V, VSS = −13.5 V
VS = ±10 V, IS = −10 mA
VS = ±10 V, IS = −10 mA
VDD = +16.5 V, VSS = −16.5 V
VS = ±10 V, VD = m 10 V;
see Figure 27
VS = ±10 V, VD = m 10 V;
see Figure 27
VS = VD = ±10 V; see Figure 23
VIN = VGND or VDD
RL = 300 Ω, CL = 35 pF
VS = 10 V; see Figure 31
RL = 300 Ω, CL = 35 pF
VS = 10 V; see Figure 31
RL = 300 Ω, CL = 35 pF
VS1 = VS2 = 10 V; see Figure 30
VS = 0 V, RS = 0 Ω, CL = 1 nF;
see Figure 32
RL = 50 Ω, CL = 5 pF, f = 1 MHz;
see Figure 26
RL = 50 Ω, CL = 5 pF, f = 1 MHz;
see Figure 25
RL = 1 kΩ, 15 V p-p, f = 20 Hz
to 20 kHz; see Figure 28
RL = 50 Ω, CL = 5 pF; see
Figure 29
RL = 50 Ω, CL = 5 pF, f = 1 MHz;
see Figure 29
VS = 0 V, f = 1 MHz
VS = 0 V, f = 1 MHz
VS = 0 V, f = 1 MHz


3Pages


ADG5412 電子部品, 半導体
DataSheet.in
ADG5412/ADG5413
Parameter
Break-Before-Make Time Delay, tD
(ADG5413 Only)
25°C
70
Charge Injection, QINJ
Off Isolation
Channel-to-Channel Crosstalk
Total Harmonic Distortion + Noise
−3 dB Bandwidth
Insertion Loss
CS (Off )
CD (Off )
CD (On), CS (On)
POWER REQUIREMENTS
IDD
95
−78
−70
0.07
180
−1.3
22
22
58
40
VDD
1 Guaranteed by design; not subject to production test.
−40°C to +85°C −40°C to +125°C Unit
ns typ
Test Conditions/Comments
RL = 300 Ω, CL = 35 pF
38
ns min
VS1 = VS2 = 8 V; see Figure 30
pC typ
VS = 6 V, RS = 0 Ω, CL = 1 nF;
see Figure 32
dB typ
RL = 50 Ω, CL = 5 pF, f = 1 MHz;
see Figure 26
dB typ
RL = 50 Ω, CL = 5 pF, f = 1 MHz;
see Figure 25
% typ
RL = 1 kΩ, 6 V p-p, f = 20 Hz
to 20 kHz; see Figure 28
MHz typ
RL = 50 Ω, CL = 5 pF; see
Figure 29
dB typ
RL = 50 Ω, CL = 5 pF, f = 1 MHz;
see Figure 29
pF typ
VS = 6 V, f = 1 MHz
pF typ
VS = 6 V, f = 1 MHz
pF typ
VS = 6 V, f = 1 MHz
VDD = 13.2 V
μA typ
Digital inputs = 0 V or VDD
65 μA max
9/40 V min/V max GND = 0 V, VSS = 0 V
36 V SINGLE SUPPLY
VDD = 36 V ± 10%, VSS = 0 V, GND = 0 V, unless otherwise noted.
Table 4.
Parameter
ANALOG SWITCH
Analog Signal Range
On Resistance, RON
25°C −40°C to +85°C −40°C to +125°C Unit
0 V to VDD
V
10.6 Ω typ
On-Resistance Match Between Channels,
∆RON
On-Resistance Flatness, RFLAT(ON)
LEAKAGE CURRENTS
Source Off Leakage, IS (Off )
12 15
0.35
0.7 0.9
2.7
3.2 3.8
±0.05
17
1.1
4.5
Ω max
Ω typ
Ω max
Ω typ
Ω max
nA typ
Drain Off Leakage, ID (Off )
±0.25 ±0.75
±0.05
±3.5
nA max
nA typ
Channel On Leakage, ID (On), IS (On)
±0.25 ±0.75
±0.1
±3.5
nA max
nA typ
±0.4 ±2 ±12 nA max
Test Conditions/Comments
VS = 0 V to 30 V, IS = −10 mA;
see Figure 24
VDD = 32.4 V, VSS = 0 V
VS = 0 V to 30 V, IS = −10 mA
VS = 0 V to 30 V, IS = −10 mA
VDD = 39.6 V, VSS = 0 V
VS = 1 V/30 V, VD = 30 V/1 V;
see Figure 27
VS = 1 V/30 V, VD = 30 V/1 V;
see Figure 27
VS = VD = 1 V/30 V; see
Figure 23
Rev. 0 | Page 6 of 20

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