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ADM1027 の電気的特性と機能

ADM1027のメーカーはAnalog Devicesです、この部品の機能は「dBCOOL Remote Thermal Controller and Voltage Monitor」です。


製品の詳細 ( Datasheet PDF )

部品番号 ADM1027
部品説明 dBCOOL Remote Thermal Controller and Voltage Monitor
メーカ Analog Devices
ロゴ Analog Devices ロゴ 




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ADM1027 Datasheet, ADM1027 PDF,ピン配置, 機能
dBCOOL Remote Thermalwww.DataSheet4U.com
Controller and Voltage Monitor
ADM1027*
FEATURES
Monitors up to 5 Supply Voltages
Controls and Monitors up to 4 Fan Speeds
1 On-Chip and 2 Remote Temperature Sensors
Monitors up to 5 Processor VID Bits
Automatic Fan Speed Control Mode Controls System
Cooling Based on Measured Temperature
Enhanced Acoustic Mode Dramatically Reduces User
Perception of Changing Fan Speeds
2-Wire and 3-Wire Fan Speed Measurement
Limit Comparison of All Monitored Values
Meets SMBus 2.0 Electrical Specifications
(Fully SMBus 1.1 Compliant)
APPLICATIONS
Low Acoustic Noise PCs
Networking and Telecommunications Equipment
GENERAL DESCRIPTION
The ADM1027 dBCOOL controller is a complete systems
monitor and multiple PWM fan controller for noise sensitive
applications requiring active system cooling. It can monitor
12 V, 5 V, 2.5 V CPU supply voltage, plus its own supply volt-
age. It can monitor the temperature of up to two remote sensor
diodes, plus its own internal temperature. It can measure and
control the speed of up to four fans so that they operate at the
lowest possible speed for minimum acoustic noise. The auto-
matic fan speed control loop optimizes fan speed for a given
temperature. Once the control loop parameters are programmed,
the ADM1027 can vary fan speed without CPU intervention.
FUNCTIONAL BLOCK DIAGRAM
ADDR
SELECT ADDR EN SCL SDA SMBALERT
VID4
VID3
VID2
VID1
VID0
PWM1
PWM2
PWM3
TACH1
TACH2
TACH3
TACH4
VCC
D1+
D1–
D2+
D2–
+5VIN
+12VIN
+2.5VIN
VCCP
PWM
REGISTERS
AND
CONTROLLERS
VID
REGISTER
ACOUSTIC
ENHANCEMENT
CONTROL
SMBUS
ADDRESS
SELECTION
SERIAL BUS
INTERFACE
ADDRESS
POINTER
REGISTER
AUTOMATIC
FAN SPEED
CONTROL
PWM
CONFIGURATION
REGISTERS
VCC TO ADM1027
FAN SPEED
COUNTER
BAND GAP
TEMP. SENSOR
INPUT
SIGNAL
CONDITIONING
AND
ANALOG
MULTIPLEXER
ADM1027
10-BIT
ADC
BAND GAP
REFERENCE
INTERRUPT
MASKING
INTERRUPT
STATUS
REGISTERS
LIMIT
COMPARATORS
VALUE AND
LIMIT
REGISTERS
GND
*Protected by U.S. Patent Nos. 6,188,189; 6,169,442; 6,097,239; 5,982,221;
and 5,867,012. Other patents pending.
REV. A
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties that
may result from its use. No license is granted by implication or otherwise
under any patent or patent rights of Analog Devices. Trademarks and
registered trademarks are the property of their respective companies.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781/329-4700
www.analog.com
Fax: 781/326-8703 © 2003 Analog Devices, Inc. All rights reserved.

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ADM1027 pdf, ピン配列
ADM1027www.DataSheet4U.com
Parameter
Min Typ Max Unit
OPEN-DRAIN SERIAL DATA BUS
OUTPUT (SDA)
Output Low Voltage, VOL
High Level Output Current, IOH
SMBUS DIGITAL INPUTS
(SCL, SDA)
Input High Voltage, VIH
Input Low Voltage, VIL
Hysteresis
0.4 V
0.1 1
mA
2.0 V
0.4 V
500 mV
DIGITAL INPUT LOGIC LEVELS
(VID0–4)
Input High Voltage, VIH
Input Low Voltage, VIL
DIGITAL INPUT LOGIC LEVELS
(TACH INPUTS)
Input High Voltage, VIH
Input Low Voltage, VIL
Hysteresis
1.7 V
0.8 V
2.0 V
5.5 V
0.8 V
–0.3 V
0.5 V p-p
DIGITAL INPUT CURRENT
Input High Current, IIH
Input Low Current, IIL
Input Capacitance, CIN
–1 mA
1 mA
5 pF
SERIAL BUS TIMING
Clock Frequency, fSCLK
Glitch Immunity, tSW
Bus Free Time, tBUF
Start Setup Time, tSU;STA
Start Hold Time, tHD;STA
SCL Low Time, tLOW
SCL High Time, tHIGH
SCL, SDA Rise Time, tr
SCL, SDA Fall Time, tf
Data Setup Time, tSU;DAT
Data Hold Time, tHD;DAT
Detect Clock Low Timeout, tTIMEOUT
10
4.7
4.7
4.0
4.7
4.0
250
300
15
100
50
50
1000
300
35
kHz
ns
ms
ms
ms
ms
ms
ns
ms
ns
ns
ms
NOTES
1All voltages are measured with respect to GND, unless otherwise specified.
2Typicals are at TA = 40C and represent the most likely parametric norm.
3Logic inputs will accept input high voltages up to VMAX even when the device is operating down to VMIN.
4Timing specifications are tested at logic levels of VIL = 0.8 V for a falling edge and VIH = 2.0 V for a rising edge.
Specifications subject to change without notice.
Test Conditions/Comment
IOUT = –4.0 mA, VCC = 3.3 V
VOUT = VCC
Maximum Input Voltage
Minimum Input Voltage
VIN = VCC
VIN = 0
See Figure 1
See Figure 1
See Figure 1
See Figure 1
See Figure 1
See Figure 1
See Figure 1
See Figure 1
See Figure 1
See Figure 1
See Figure 1
Can Be Optionally Disabled
REV. A
–3–


3Pages


ADM1027 電子部品, 半導体
ADM1027
www.DataSheet4U.com
FUNCTIONAL DESCRIPTION
General Description
The ADM1027 is a complete systems monitor and multiple fan
controller for any system requiring monitoring and cooling. The
device communicates with the system via a serial system
management bus. The serial bus controller has an optional
address line for device selection (Pin 14), a serial data line
for reading and writing addresses and data (Pin 1), and an input
line for the serial clock (Pin 2). All control and programming
functions of the ADM1027 are performed over the serial bus. In
addition, one of the pins can be reconfigured as an SMBALERT
output to indicate out-of-limit conditions.
Measurement Inputs
The device has six measurement inputs, four for voltage and
two for temperature. It can also measure its own supply voltage
and can measure ambient temperature with its on-chip tempera-
ture sensor.
Pins 20 to 23 are analog inputs with on-chip attenuators,
configured to monitor 5 V, 12 V, 2.5 V, and the processor core
voltage (2.25 V input), respectively.
Power is supplied to the chip via Pin 4, which the system also
uses to monitor VCC. In PCs, this pin is normally connected to a
3.3 V standby supply. This pin can, however, be connected to a
5 V supply and monitor it without overranging.
Remote temperature sensing is provided by the D1+/– and
D2+/– inputs, to which diode-connected, external temperature-
sensing transistors such as a 2N3906 or CPU thermal diode
may be connected.
The ADC also accepts input from an on-chip band gap tem-
perature sensor that monitors system ambient temperature.
Sequential Measurement
When the ADM1027 monitoring sequence is started, it cycles
sequentially through the measurement of analog inputs and the
temperature sensors. Measured values from these inputs are
stored in value registers. These can be read out over the serial
bus, or can be compared with programmed limits stored in the
limit registers. The results of out-of-limit comparisons are stored
in the status registers, which can be read over the serial bus to
flag out-of-limit conditions.
Processor Voltage ID
Five digital inputs (VID0 to VID4 — Pins 5 to 8 and 19) read
the processor Voltage ID code and store it in the VID register,
from which it can be read out by the management system over
the serial bus. The VID code monitoring function is compatible
with both VRM9.x and future VRM10 solutions. The VID code
monitoring function is compatible with VRM9.x.
ADM1027 Address Selection
Pin 13 is the dual function PWM3/ADDRESS ENABLE pin.
If Pin 13 is pulled low on power-up, the ADM1027 will read the
state of Pin 14 (TACH4/ADDRESS SELECT pin) to determine
the ADM1027 slave address. If Pin 13 is high on power-up, then
the ADM1027 will default to SMBus slave address 0x5C. This
function is described later in more detail.
Internal Registers of the ADM1027
A brief description of the ADM1027’s principal internal regis-
ters follows. More detailed information on the function of each
register is given in Tables IV to XXXVI.
Configuration Registers
Provide control and configuration of the ADM1027, including
alternate pinout functionality.
Address Pointer Register
Contains the address that selects one of the other internal registers.
When writing to the ADM1027, the first byte of data is always a
register address, which is written to the Address Pointer Register.
Status Registers
Provide the status of each limit comparison and are used to
signal out-of-limit conditions on the temperature, voltage, or
fan speed channels. If Pin 10 is configured as SMBALERT,
then this pin will assert low whenever a status bit gets set.
Interrupt Mask Registers
Allow each interrupt status event to be masked when Pin 10 is
configured as an SMBALERT output. This affects only the
SMBALERT output and not the bits in the status register.
VID Register
The status of the VID0 to VID4 pins of the processor can be
read from this register.
Value and Limit Registers
The results of analog voltage inputs, temperature, and fan speed
measurements are stored in these registers, along with their limit
values.
Offset Registers
Allow each temperature channel reading to be offset by a twos
complement value written to these registers.
TMIN Registers
Program the starting temperature for each fan under automatic
fan speed control.
TRANGE Registers
Program the temperature-to-fan speed control slope in automatic
Fan Speed Control Mode for each PWM output.
Enhance Acoustics Registers
Allow each PWM output controlling fan to be tweaked to enhance
the system’s acoustics.
–6– REV. A

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