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PDF BU7985KVT Data sheet ( Hoja de datos )

Número de pieza BU7985KVT
Descripción 56bit LVDS Receiver 8:56 DeSerializer
Fabricantes ROHM Semiconductor 
Logotipo ROHM Semiconductor Logotipo



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No Preview Available ! BU7985KVT Hoja de datos, Descripción, Manual

LVDS Interface ICs
56bit LVDS Receiver
8:56 Deserializer
BU7985KVT
No.12057EAT04
Description
LVDS Interface IC of ROHM "Serializer" "Deserializer" operate from 8MHz to 150MHz wide clock range, and number of bits
range is from 35 to 70. Data is transmitted seven times (7X) stream and reduce cable number by 3(1/3) or less. The
ROHM's LVDS has low swing mode to be able to expect further low EMI.
Features
1) Wide dot clock range: Single (112MHz)/Dual (180MHz) (NTSC, VGA, SVGA, WXGA UXGA)
2) Support clock frequency from 20MHz up to 112MHz.
3) User programmable LVCMOS data output triggering timing by using either rising or falling edge of clock.
4) User programmable LVCMOS data and clock output driving ability.
5) Support Fail-Safe Hi-z Operation.
6) 56bit LVDS transmitter is recommended to use BU7988KVT.
Applications
Flat Panel Display
Precaution
This chip is not designed to protect from radioactivity.
www.rohm.com
© 2011 ROHM Co., Ltd. All rights reserved.
1/20
2011.12 - Rev.A

1 page




BU7985KVT pdf
BU7985KVT
Technical Note
Pin Description
Table 1 : Pin Description
Pin Name
Pin No.
RA1+, RA1-
78, 77
RB1+, RB1-
80, 79
RC1+, RC1-
83, 82
RD1+, RD1-
87, 86
RCLK1+, RCLK1-
85, 84
RA2+, RA2-
90, 89
RB2+, RB2-
92, 91
RC2+, RC2-
95, 94
RD2+, RD2-
99, 98
RCLK2+, RCLK2-
R17 R10
G17 G10
B17 B10
R27 R20
G27 G20
B27 B20
DE
97, 96
52, 51, 50, 47,
46, 45, 44, 43
62, 61, 60, 59,
58, 55, 54, 53
72, 71, 68, 67,
66, 65, 64, 63
19, 18, 17, 14,
13, 12, 11, 10
29, 26, 25, 24,
23, 22, 21, 20
39, 38, 37, 36,
35, 32, 31, 30
75
VSYNC
74
HSYNC
73
CLKOUT
40
DRVSEL
9
R/F 8
MODE1,MODE0
6, 5
Type
Descriptions
LVDS IN
LVDS IN
LVDS IN
LVDS IN
LVDS Data Input for 1st Link.
The 1st pixel input data when Dual Link.
+ : Positive input of LVDS data differential pair.
- : Negative input of LVDS data differential pair.
LVDS IN LVDS Clock Input for 1st Link.
LVDS IN
LVDS IN
LVDS IN
LVDS Data Input for 2nd Link.
These pins are disabled when Single Link.
+ : Positive input of LVDS data differential pair.
- : Negative input of LVDS data differential pair.
LVDS IN
LVDS IN LVDS Clock Input for 2nd Link.
OUT
OUT The 1st Pixel Data Outputs.
OUT
OUT
OUT The 2nd Pixel Data Outputs.
OUT
OUT Data Enable Output.
OUT Vsync Output.
OUT Hsync Output.
OUT
IN
IN
IN
Clock Output.
Output Driverbility Select.
L: Data output 2mA / Clock output 4mA
H: Data output 4mA / Clock output 8mA
Output Clock Triggering Edge Select.
H: Rising edge, L: Falling edge.
Pixel Data Mode.
MODE1 MODE0
LL
LH
HL
HH
Mode
Dual Link
Single Link
Dual Link With Fail-Safe Hiz
Single Link With Fail-Safe Hiz
www.rohm.com
© 2011 ROHM Co., Ltd. All rights reserved.
5/20
2011.12 - Rev.A

5 Page





BU7985KVT arduino
BU7985KVT
Technical Note
AC characteristics
Table 8 : Switching CharacteristicsVDD=3.0V3.6V, Ta=-20℃~+85℃)
Parameter
Symbol
Min
Dual-in / Dual-out
11.11
CLK OUT Period
tRCP
Single-in / Dual-out
17.85
Typ
tRCIP
2tRCIP
CLKOUT High Time
tRCH - 0.5tRCP
CLKOUT Low Time
tRCL - 0.5tRCP
LVCMOS Data Setup to CLKOUT
tRS 0.3tRCP
-
LVCMOS data hold from CLKOUT
tRH 0.3tRCP
-
LVCMOS Low to High Transition Time tTLH -
3.0
LVCMOS Low to Low Transition Time
tTHL -
3.0
Input Data Position0 (TRCIP = 8.9ns)
Input Data Position1 (TRCIP = 8.9ns)
Input Data Position2 (TRCIP = 8.9ns)
Input Data Position3 (TRCIP = 8.9ns)
Input Data Position4 (TRCIP = 8.9ns)
Input Data Position5 (TRCIP = 8.9ns)
Input Data Position6 (TRCIP = 8.9ns)
Phase Lock Loop Set
tRIP1
tRIP0
tRIP6
tRIP5
tRIP4
tTOP3
tRIP2
tRRLL
-0.25
tRCP
7 -0.25
tRCIP
2 7 -0.25
tRCIP
3 -0.25
7
tRCIP
4 -0.25
7
tRCIP
5 7 -0.25
tRCIP
6 7 -0.25
-
0.0
tRCIP
7
tRCIP
27
tRCIP
3
7
tRCIP
4
7
tRCIP
57
tRCIP
67
-
CLKIN Period
tRCIP
8.9
-
Skew Time between RCLK1 and RCLK2
tck12
-
-
Max Units
50 ns
100
- ns
- ns
- ns
- ns
5.0 ns
5.0
+0.25
2
tRCIP
7
+0.25
tTCOP
2 7 +0.25
tRCIP
3 +0.25
7
tRCIP
4 +0.25
7
tRCIP
5 7 +0.25
tRCIP
6 7 +0.25
10.0
ns
ns
ns
ns
ns
ns
ns
ms
50 ns
±0.3tRCIP
ns
www.rohm.com
© 2011 ROHM Co., Ltd. All rights reserved.
11/20
2011.12 - Rev.A

11 Page







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