DataSheet.es    


PDF IS41LV85125A Data sheet ( Hoja de datos )

Número de pieza IS41LV85125A
Descripción 512K x 8 (4-MBIT) DYNAMIC RAM
Fabricantes Integrated Silicon Solution 
Logotipo Integrated Silicon Solution Logotipo



Hay una vista previa y un enlace de descarga de IS41LV85125A (archivo pdf) en la parte inferior de esta página.


Total 18 Páginas

No Preview Available ! IS41LV85125A Hoja de datos, Descripción, Manual

IS41C85125A
IS41LV85125A
512K x 8 (4-MBIT) DYNAMIC RAM
WITH FAST PAGE MODE
ISSI®
www.DataSheet4U.com
APRIL 2005
FEATURES
• Fast access and cycle time
• TTL compatible inputs and outputs
• Refresh Interval: 1024 cycles/16 ms
• Refresh Mode: RAS-Only, CAS-before-RAS
(CBR), and Hidden
• JEDEC standard pinout
• Single power supply:
-- 5V ± 10% (IS41C85125A)
-- 3.3V ± 10% (IS41LV85125A)
• Lead-free available
DESCRIPTION
The ISSI IS41C85125A and IS41LV85125A are 512,288 x 8-
bit high-performance CMOS Dynamic Random Access
Memories. Fast Page Mode allows 1024 random accesses
within a single row with access cycle time as short as 12
ns per 8-bit word.
These features make the IS41C85125A and the
IS41LV85125A ideally suited for high band-width graphics,
digital signal processing, high-performance computing
systems, and peripheral applications.
The IS41C85125A and IS41LV85125A are available in a
28-pin, 400-mil SOJ package.
KEY TIMING PARAMETERS
Parameter
Max. RAS Access Time (tRAC)
Max. CAS Access Time (tCAC)
Max. Column Address Access Time (tAA)
Min. Fast Page Mode Cycle Time (tPC)
Min. Read/Write Cycle Time (tRC)
-60 Unit
60 ns
15 ns
30 ns
40 ns
110 ns
PIN DESCRIPTIONS
A0-A9
I/O0-I/O7
WE
OE
RAS
CAS
VCC
GND
NC
Address Inputs
Data Inputs/Outputs
Write Enable
Output Enable
Row Address Strobe
Column Address Strobe
Power
Ground
No Connection
PIN CONFIGURATION
28-Pin SOJ
VCC
I/O0
I/O1
I/O2
I/O3
NC
WE
RAS
A9
A0
A1
A2
A3
VCC
1
2
3
4
5
6
7
8
9
10
11
12
13
14
28 GND
27 I/O7
26 I/O6
25 I/O5
24 I/O4
23 CAS
22 OE
21 NC
20 A8
19 A7
18 A6
17 A5
16 A4
15 GND
Copyright © 2005 Integrated Silicon Solution, Inc. All rights reserved. ISSI reserves the right to make changes to this specification and its products at any time
without notice. ISSI assumes no liability arising out of the application or use of any information, products or services described herein. Customers are advised to
obtain the latest version of this device specification before relying on any published information and before placing orders for products.
Integrated Silicon Solution, Inc. — 1-800-379-4774
Rev. B
04/21/05
1

1 page




IS41LV85125A pdf
IS41C85125A
IS41LV85125A
ISSI ®
www.DataSheet4U.com
ELECTRICAL CHARACTERISTICS(1) (Recommended Operation Conditions unless otherwise noted.)
Symbol Parameter
Test Condition
Speed Min. Max. Unit
IIL Input Leakage Current
Any input 0V VIN Vcc
Other inputs not under test = 0V
–10 10
µA
IIO Output Leakage Current
Output is disabled (Hi-Z)
0V VOUT Vcc
–10 10
µA
VOH Output High Voltage Level IOH = –2 mA
2.4 —
V
VOL Output Low Voltage Level IOL = 2 mA
— 0.4 V
ICC1 Stand-by Current: TTL
RAS, CAS VIH
5V Com.
— 2 mA
ICC1 Stand-by Current: TTL
RAS, CAS VIH
3.3V Com.
— 2 mA
ICC2 Stand-by Current: CMOS
RAS, CAS VCC – 0.2V 5V
— 2 mA
3.3V — 2
ICC3 Operating Current:
RAS, CAS,
-60 — 170 mA
Random Read/Write(2,3,4)
Address Cycling, tRC = tRC (min.)
Average Power Supply Current
ICC4 Operating Current:
Fast Page Mode(2,3,4)
RAS = VIL, CAS,
Cycling tPC = tPC (min.)
-60 — 170 mA
Average Power Supply Current
ICC5 Refresh Current:
RAS-Only(2,3)
RAS Cycling, CAS VIH
tRC = tRC (min.)
-60 — 170 mA
Average Power Supply Current
ICC6 Refresh Current:
CBR(2,3,5)
RAS, CAS Cycling
tRC = tRC (min.)
-60 — 170 mA
Average Power Supply Current
Notes:
1. An initial pause of 200 µs is required after power-up followed by eight RAS refresh cycles (RAS-Only or CBR) before proper device
operation is assured.The eight RAS cycles wake-up should be repeated any time the tREF refresh requirement is exceeded.
2. Dependent on cycle rates.
3. Specified values are obtained with minimum cycle time and the output open.
4. Column-address is changed once each fast page cycle.
5. Enables on-chip refresh and address counters.
Integrated Silicon Solution, Inc. — 1-800-379-4774
Rev. B
04/21/05
5

5 Page





IS41LV85125A arduino
IS41C85125A
IS41LV85125A
FAST-PAGE-MODE EARLY WRITE CYCLE (OE = DON'T CARE)
RAS
tCRP
CAS
tASR
ADDRESS
Row
WE
I/O
tRAS
tRC
tRCD
tCSH
tRSH
tCAS tCLCH
tRAD
tRAH
tASC
tAR
tRAL
tCAH
tACH
Column
tWCR
tWCS
tCWL
tRWL
tWCH
tWP
tDHR
tDS
tDH
Valid Data
ISSI ®
www.DataSheet4U.com
tRP
Row
Don't Care
Integrated Silicon Solution, Inc. — 1-800-379-4774
Rev. B
04/21/05
11

11 Page







PáginasTotal 18 Páginas
PDF Descargar[ Datasheet IS41LV85125A.PDF ]




Hoja de datos destacado

Número de piezaDescripciónFabricantes
IS41LV85125512K x 8 (4-MBIT) DYNAMIC RAMIntegrated Silicon Solution
Integrated Silicon Solution
IS41LV85125A512K x 8 (4-MBIT) DYNAMIC RAMIntegrated Silicon Solution
Integrated Silicon Solution

Número de piezaDescripciónFabricantes
SLA6805M

High Voltage 3 phase Motor Driver IC.

Sanken
Sanken
SDC1742

12- and 14-Bit Hybrid Synchro / Resolver-to-Digital Converters.

Analog Devices
Analog Devices


DataSheet.es es una pagina web que funciona como un repositorio de manuales o hoja de datos de muchos de los productos más populares,
permitiéndote verlos en linea o descargarlos en PDF.


DataSheet.es    |   2020   |  Privacy Policy  |  Contacto  |  Buscar