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PDF SEN6A39 Data sheet ( Hoja de datos )
| Número de pieza | SEN6A39 | |
| Descripción | 80-COLUMN driver | |
| Fabricantes | Avant Electronics | |
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DATA SHEET
www.DataSheet4U.com
SEN6A39
80-COLUMN driver for
dot-matrix STN LCD
To improve design and/or performance,
Avant Electronics may make changes to its
products. Please contact Avant Electronics
for the latest versions of its products
data sheet (v3)
2005 Oct 20
1 page  
Avant Electronics
SEN6A39
80-COLUMN driver for dot-matrix STN
3.2 Signal description
Table 2 Pin signal description.
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To avoid a latch-up effect at power-on: VSS − 0.5 V < voltage at any pin at any time < VDD + 0.5 V .
Pin
number
SYMBOL
I/O
DESCRIPTION
1~3,
O78~O80,
24~100 O1~O77
Column (segment) driver output.
Output Please refer to Table 4 for output voltage level.
ENABLE input/output for cascading application.
The functionality of these two inputs are decided by DUAL and DIR, as shown in
the following table.
4, 21 EIO1, EIO2 I/O
DUAL
L
L
H
DIR EIO1
L input
H output
don’t care input
EIO2
output
input
output
5 SCP
6 FR
7 LP
Input
Input
Input
Input data shift clock, for shifting bit data.
Frame signal, indicating a display frame.
This signal is used to generate alternating LCD bias voltage.
Line pulse, used as latch clock for internal 80-bit shift register.
Data Format selection.
These two inputs are used to select bit number of data transfer between a
controller (such as the SAP1024B, for example) and the SEN6A39. The data
transfer can be 1-bit, 2-bit, or 4-bit, as shown in the following table.
8, 9
DF1, DF2
Input DF1
DF2
LL
HL
don’t care H
BITS
1-bit
2-bit
4-bit
10
11
12
13
14~17
18,19,
20
22, 23
VSS
DUAL
DIR
VDD
DI4 ~ DI1
V2, V3, V5
NC
Input
Input
Input
input
Input
Input
Ground terminal.
Selection of dual-input mode or single-input mode.
Selecting shift direction of input data.
Positive power supply for control logic.
4-bit parallel data bus for display data.
External LCD bias voltage.
No Connection.
Leave these two pins unconnected in application.
2005 Oct 20
5 of 20
data sheet (v3)
5 Page 
Avant Electronics
SEN6A39
80-COLUMN driver for dot-matrix STN
7 DC CHARACTERISTICS
Table 7 DC Characteristics
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VDD = 5 V ±10%; VSS = 0 V; all voltages with respect to VSS unless otherwise specified; Tamb = 25±2 °C.
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX. UNIT
VDD
VDD-V5
VIL
VIH
IIL
IIH
VOL
VOH
ISTBY
ISS
IEE
Ci
RON1
RON2
Supply voltage for control logic
LCD bias voltage
Input LOW voltage of input pins
Inout HIGH voltage of input pins
Input LOW leakage current of
input pins (i. e. Reverse leakage
current of input ESD protection
diode)
Input HIGH leakage current of
input pins (i. e. Reverse leakage
current of input protection diode)
Output LOW voltage level of the
EIO1 and EIO2 pins
Output HIGH voltage level of the
EIO1 and EIO2 pins
Standby current
Operating current
Operating current
Input capacitance of the SCP pin
Driver ON resistance at
VLCD= 30 V
Driver ON resistance at
VLCD= 20 V
Please refer to Fig. 8 for DC
power-up sequence.
Note 1.
DI1~DI4, SCP, DIR, EIO1,
EIO2, LP, FR, DUAL, DF1,
DF2
DI1~DI4, SCP, DIR, EIO1,
EIO2, LP, FR, DUAL, DF1,
DF2
VIN=VSS,
DI1~DI4, SCP, DIR, EIO1,
EIO2, LP, FR, DUAL, DF1,
DF2
VIN=VDD,
DI1~DI4, SCP, DIR, EIO1,
EIO2, LP, FR, DUAL, DF1,
DF2
IOL=400µA
IOH=-400µA
Note 2.
Note 3.
Note 4.
The SCP clock frequency is
6.0 MHz.
Note 5.
Note 5.
2.7
12
0
0.8VDD
0.0
VDD − 0.4
5.0
5.0
1.5
2.0
5.5
30
0.2VDD
V
V
VDD
V
1 µA
1 µA
0.4 V
VDD
V
200 µA
4.0 mA
0.5 mA
pF
3.0 ΚΩ
3.5 ΚΩ
Notes:
1. The condition VDD ≥ V2 > V3 > V5 must always be met.
2. EIO1=EIO2=VDD, VDD-V5=30 V, SCP=6.0MHz, Output unloaded; measured at the VSS pin.
3. Condition for the measurement: VLCD=VDD-V5=30 V, SCP=6.0 MHz, LP=14 KHz, FR=35 Hz. This is the current
flowing from VDD to VSS, measured at the VSS pin.
4. Condition for the measurement: VLCD=VDD-V5=30 V, SCP=6.0 MHz, LP=14 KHz, FR=35 Hz. This is the current
flowing from VDD to V5, measured at the V5 pin.
5. Condition for the measurment: VDD-V5=30 V, |VDE-VO|=0.5 V, where VDE= one of VDD, V2, V3, or V5.
V2=VDD - (2/9) x (VDD-V5), V3=VDD - (7/9) x (VDD-V5). For the driver circuits (O1~O80), please refer to Section 11
Pin Circuits.
2005 Oct 20
11 of 20
data sheet (v3)
11 Page | ||
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