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ISL97675 の電気的特性と機能

ISL97675のメーカーはIntersil Corporationです、この部品の機能は「4-Channel LED Driver」です。


製品の詳細 ( Datasheet PDF )

部品番号 ISL97675
部品説明 4-Channel LED Driver
メーカ Intersil Corporation
ロゴ Intersil Corporation ロゴ 




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ISL97675 Datasheet, ISL97675 PDF,ピン配置, 機能
www.DataSheet4U.com
4-Channel LED Driver with Phase Shift Control
ISL97675
The ISL97675 is an LED driver that drives 4 channels of
low power LEDs from 4.5V to 26V input and up to 45V
output.
The ISL97675 compensates for non-uniformity of the
forward voltage drops in the LED strings with its 4 voltage
controlled-current source channels. Its headroom control
monitors the highest LED forward voltage string for output
regulation, to minimize the voltage headroom and power
loss in the typical multi-string operation.
The ISL97675 offers two PWM Dimming modes: The part
digitizes the incoming 100Hz to 30kHz PWM signal and
provides 8-bit PWM dimming with phase shift function.
Another mode is direct PWM mode without phase shift,
where the dimming frequency follows the input PWM
signal and the minimum on time can be as short as 350ns.
The ISL97675 features channel phase shift control to
minimize the input, output ripple characteristics and load
transients as well as spreading the light output to help
eliminate or reduce the video and audio noise interference
from the backlight driver operation.
Features
• 4 x 30mA Channels
• 45V Output Max
• 4.5V to 26V Input
• Channel Phase Shift PWM Dimming with 8-bit
resolution
• 0.007% Direct PWM dimming at 200Hz
• Current Matching of ±1.5% from 1% ~ 100% Dimming
• Dynamic Headroom Control
• Protections
- String Open/Short Circuit, VOUT Short Circuit
Overvoltage, and Over-temperature Protections
- Optional Master Fault Protection
• Selectable 600kHz or 1.2MHz Switching Frequency
• 20 Ld QFN 4mmx4mm Package
Applications*(see page 19)
• Netbook Displays LED Backlighting
• Notebook Displays LED Backlighting
Typical Application Circuit
VIN* = 4.5V~26V
VOUT = 45V max*
ILED = 30mA PER STRING
ISL97675
17 FAULT
19 VIN
1 VDDIO
SW 16
OVP 14
PGND 15
3 FSW/Phase Shift
2 EN
20 PWM
18 COMP
FB1 12
FB2 11
13 RFPWM/DirectPWM
FB3 7
4 ISET
FB4 6
8 AGND
9 AGND
* VIN 6V
May 19, 2010
FN7630.0
1 CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-468-3774 | Intersil (and design) is a registered trademark of Intersil Americas Inc.
Copyright Intersil Americas Inc. 2010. All Rights Reserved
All other trademarks mentioned are the property of their respective owners.

1 Page





ISL97675 pdf, ピン配列
Pin Configuration
ISL97675
ISL97675
(20 LD QFN)
TOP VIEW
20 19 18 17 16
VDDIO 1
EN 2
FSW/PhaseShift 3
ISET 4
NC 5
ISL97675
4mmx4mm
15 PGND
14 OVP
13 RFPWM/DirectPWM
12 FB1
11 FB2
6 7 8 9 10
www.DataSheet4U.com
Pin Descriptions (I = Input, O = Output, S = Supply)
PIN NAME
VDDIO
EN
FSW/PhaseShift
PIN NO.
1
2
3
ISET
4
NC
FB4
FB3
AGND
FB2
FB1
RFPWM/DirectPWM
5, 10
6
7
8, 9
11
12
13
OVP
PGND
SW
14
15
16
TYPE
S
I
I
I
I
I
I
S
I
I
I
I
S
O
DESCRIPTION
Decouple with capacitor for internally generated supply rail.
Enable
FSW = 0 ~ 0.25 * VDDIO, Boost Switching Frequency = 600kHz with phase shift.
FSW = 0.25 * VDDIO ~ 0.5 * VDDIO, Boost Switching Frequency = 600kHz without
phase shift.
FSW = 0.5 * VDDIO ~ 0.75 * VDDIO, Boost Switching Frequency = 1.2MHz without
phase shift.
FSW = 0.75 * VDDIO ~ VDDIO, Boost Switching Frequency = 1.2MHz with phase
shift.
Resistor connection for setting LED current, (see Equation 3 for calculating the
ILEDpeak).
No Connect.
Input 4 to current source, FB, and monitoring.
Input 3 to current source, FB, and monitoring.
Analog Ground for precision circuits.
Input 2 to current source, FB, and monitoring.
Input 1 to current source, FB, and monitoring.
External PWM dimming with frequency modulation or Direct PWM dimming without
frequency modulation.
When this pin is not biased and a resistor is connected to ground, the dimming
frequency will be set by the Setting Resistor.
When this pin is floating, the part enters Direct PWM mode such that the dimming
follows the input PWM signal without frequency modulation.
Overvoltage protection input.
Power ground (LX Power return).
Input to boost switch.
3 FN7630.0
May 19, 2010


3Pages


ISL97675 電子部品, 半導体
ISL97675
Absolute Maximum Ratings (TA = +25°C)
VIN. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to 28V
FAULT, EN . . . . . . . . . . . . . . . -0.3V to min(28, VIN + 0.3)V
FSW/PhaseShift, RFPWM/DirectPWM, OVP . . . . -0.3V to 5.5V
VDDIO, PWM, COMP . . . . . . . -0.3V to min(5.5, VIN + 0.3)V
ISET . . . . . . . . . . . . . . . . -0.3V to min(VDDIO + 0.3, 5.5)V
FB1, FB2, FB3, FB4. . . . . . . . . . . . . . . . . . . . . -0.3V to 45V
SW . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to 46V
PGND, AGND . . . . . . . . . . . . . . . . . . . . . . . -0.3V to +0.3V
Above voltage ratings are all with respect to AGND pin
ESD Rating
Human Body Model (Tested per JESD22-A114E) . . . . . 3kV
Machine Model (Tested per JESD22-A115-A) . . . . . . . 300V
Charged Device Model . . . . . . . . . . . . . . . . . . . . . . . 1kV
Thermal Information
Thermal Resistance (Typical)
www.DataSheet4U.com
θJA (°C/W) θJC (°C/W)
20 Ld QFN Package (Notes 4, 5, 7) . 39
2.5
Thermal Characterization (Typical)
PSIJT (°C/W)
20 Ld QFN Package (Note 6) . . . . . . . . . . . .
3
Maximum Continuous Junction Temperature . . . . . . +125°C
Storage Temperature . . . . . . . . . . . . . . . -65°C to +150°C
Pb-free reflow profile . . . . . . . . . . . . . . . . . . .see link below
http://www.intersil.com/pbfree/Pb-FreeReflow.asp
Operating Conditions
Temperature Range . . . . . . . . . . . . . . . . . . -40°C to +85°C
CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions may adversely impact
product reliability and result in failures not covered by warranty.
NOTES:
4. θJA is measured in free air with the component mounted on a high effective thermal conductivity test board with “direct attach”
features. See Tech Brief TB379.
5. For θJC, the “case temp” location is the center of the exposed metal pad on the package underside.
6. PSIJT is the PSI junction-to-top thermal characterization parameter. If the package top temperature can be measured with this
rating then the die junction temperature can be estimated more accurately than the θJC and θJC thermal resistance ratings.
7. Refer to JESD51-7 high effective thermal conductivity board layout for proper via and plane designs.
Electrical Specifications
All specifications below are tested at TA = +25°C; VIN = 12V, EN = 3.3V, RISET = 19.6kΩ,
unless otherwise noted. Boldface limits apply over the operating temperature range,
-40°C to +85°C.
SYMBOL
PARAMETER
CONDITION
MIN
(Note 8)
TYP
MAX
(Note 8) UNIT
GENERAL
VIN (Note 9)
IVIN_STBY
VOUT
Backlight Supply Voltage
VIN Shutdown Current
Output Voltage
VUVLO
VUVLO_HYS
REGULATOR
Undervoltage Lockout Threshold
Undervoltage Lockout Hysteresis
EN = 0V
4.5V < VIN 26V,
FSW = 600kHz
6.75V < VIN 26V,
FSW = 1.2MHz
4.5V < VIN 6.75V,
FSW = 1.2MHz
4.5 26 V
10 μA
45 V
45 V
VIN/0.15 V
2.6 3.1 3.3 V
320 mV
VDDIO
IVDDIO_STBY
IVIN
VLDO
ENLow
LDO Output Voltage
Standby Current
Driver Input Current
VDDIO LDO Dropout Voltage
Guaranteed Range for EN Input Low
Voltage
VIN > 5.5V
EN = 0V
100% Dimming
VIN >5.5V,
IVDDIO = 20mA
4.6 4.8
5V
10 µA
9 mA
30
200
mV
0.5 V
ENHi
Guaranteed Range for EN Input High
Voltage
1.8
V
tENLow
EN Low Time before Shut-Down
29.5
ms
6 FN7630.0
May 19, 2010

6 Page



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