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UL62H256A の電気的特性と機能

UL62H256AのメーカーはZentrum Mikroelektronik Dresden AGです、この部品の機能は「Low Voltage Automotive Fast 32K x 8 SRAM」です。


製品の詳細 ( Datasheet PDF )

部品番号 UL62H256A
部品説明 Low Voltage Automotive Fast 32K x 8 SRAM
メーカ Zentrum Mikroelektronik Dresden AG
ロゴ Zentrum Mikroelektronik Dresden AG ロゴ 




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UL62H256A Datasheet, UL62H256A PDF,ピン配置, 機能
UL62H256A
Low Voltage Automotive Fast 32K x 8 SRAM
Features
Description
! 32768 x 8 bit static CMOS RAM
! 35 and 55 ns Access Time
! Common data inputs and
data outputs
! Three-state outputs
! Typ. operating supply current
35 ns: 45 mA
55 ns: 30 mA
! Standby current < 40 µA at 125 °C
! TTL/CMOS-compatible
! Power supply voltage 2.5 - 3.6 V
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-40 °C to 125 °C
! QS 9000 Quality Standard
! ESD protection > 2000 V
(MIL STD 883C M3015.7)
! Latch-up immunity >100 mA
! Package: SOP28 (300/330 mil)
The UL62H256A is a static RAM
manufactured using a CMOS pro-
cess technology with the following
operating modes:
- Read
- Standby
- Write
- Data Retention
The memory array is based on a
6-Transistor cell.
The circuit is activated by the fal-
ling edge of E. The address and
control inputs open simultaneously.
According to the information of W
and G, the data inputs, or outputs,
are active. In a Read cycle, the
data outputs are activated by the
falling edge of G, afterwards the
data word will be available at the
outputs DQ0-DQ7. After the
address change, the data outputs
go High-Z until the new information
is available. The data outputs have
no preferred state. The Read cycle
is finished by the falling edge of W,
or by the rising edge of E, respec-
tively.
Data retention is guaranteed down
to 2 V. With the exception of E, all
inputs consist of NOR gates, so
that no pull-up/pull-down resistors
are required.
Pin Configuration
A14
A12
A7
A6
A5
A4
A3
A2
A1
A0
DQ0
DQ1
DQ2
VSS
1 28
2 27
3 26
4 25
5 24
6 23
7 22
8 SOP 21
9 20
10 19
11 18
12 17
13 16
14 15
VCC
W
A13
A8
A9
A11
G
A10
E
DQ7
DQ6
DQ5
DQ4
DQ3
Top View
May 07, 2004
Pin Description
Signal Name
A0 - A14
DQ0 - DQ7
E
G
W
VCC
VSS
Signal Description
Address Inputs
Data In/Out
Chip Enable
Output Enable
Write Enable
Power Supply
Voltage
Ground
1

1 Page





UL62H256A pdf, ピン配列
UL62H256A
Characteristics
All voltages are referenced to VSS = 0 V (ground).
All characteristics are valid in the power supply voltage range and in the operating temperature range specified.
Dynamic measurements are based on a rise and fall time of 5 ns, measured between 10 % and 90 % of VI, as well as
input levels of VIL = 0.2 V and VIH = 2.8 V. The timing reference level of all input and output signals is 1.5 V,
with the exception of the tdis-times and ten-times, in which cases transition is measured ±200 mV from steady-state voltage.
Absolute Maximum Ratings a
Symbol
Min.
Max.
Unit
Power Supply Voltage
Input Voltage
Output Voltage
Power Dissipation
www.DOaptearSahteinegt4UT.ecmomperature
K-Type
A-Type
VCC
VI
VO
PD
Ta
-0.3 4.6 V
-0.5
VCC + 0.5 b
V
-0.5
VCC + 0.5 b
V
- 1W
-40 85 °C
-40 125
Storage Temperature
Output Short-Circuit Current
at VCC = 3.3 V and VO = 0 V c
Tstg
| IOS |
-65
150 °C
100 mA
a Stresses greater than those listed under „Absolute Maximum Ratings“ may cause permanent damage to the device. This is a stress rating
only, and functional operation of the device at condition above those indicated in the operational sections of this specification is not implied.
Exposure to absolute maximum rating conditions for extended periods may affect reliability
b Maximum voltage is 4.6 V
c Not more than 1 output should be shorted at the same time. Duration of the short circuit should not exceed 30 s.
Recommended
Operating Conditions
Power Supply Voltage
Input Low Voltage d
Input High Voltage
d -2 V at Pulse Width 30 ns
Symbol
VCC
VIL
VIH
Conditions
Min.
2.5
-0.3
2.0
Max.
Unit
3.6 V
0.5 V
VCC + 0.3
V
May 07, 2004
3


3Pages


UL62H256A 電子部品, 半導体
UL62H256A
Data Retention Mode
E - controlled
3.0 V
VCC
2.2 V
0V
tsu(DR)
VCC(DR) 2 V
Data Retention
trec
2.2 V
E
VCC(DR) - 0.2 V VE(DR) VCC(DR) + 0.3 V
www.DDaattaaShReeette4nU.tcioomn
Characteristics
Data Retention Supply Voltage
Data Retention Supply Current
Data Retention Setup Time
Operating Recovery Time
Symbol
Alt. IEC
Conditions
VCC(DR)
ICC(DR)
VCC(DR) = 2V
VE = VCC(DR) - 0.2 V
K-Type
A-Type
tCDR
tR
tsu(DR)
trec
See Data Retention
Waveforms (above)
Min.
2
0
tcR
Typ. Max.
5
20
Unit
V
µA
µA
ns
ns
Test Configuration for Functional Check
A0 VCC
A1
A2
A3
A4 DQ0
A5 DQ1
VIH
A6
A7
A8
DQ2
DQ3
A9 DQ4
VIL
A10
A11
A12
DQ5
DQ6
A13 DQ7
A14
E
W
G VSS
3.0 V
1076
VO
30 pF e
1260
e In measurement of tdis(E),tdis(W), ten(E), ten(W), ten(G) the capacitance is 5 pF.
6
May 07, 2004

6 Page



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共有リンク

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部品番号部品説明メーカ
UL62H256A

Low Voltage Automotive Fast 32K x 8 SRAM

Zentrum Mikroelektronik Dresden AG
Zentrum Mikroelektronik Dresden AG


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