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STE250N06のメーカーはSTMicroelectronicsです、この部品の機能は「N - CHANNEL ENHANCEMENT MODE POWER MOS TRANSISTOR」です。 |
部品番号 | STE250N06 |
| |
部品説明 | N - CHANNEL ENHANCEMENT MODE POWER MOS TRANSISTOR | ||
メーカ | STMicroelectronics | ||
ロゴ | |||
このページの下部にプレビューとSTE250N06ダウンロード(pdfファイル)リンクがあります。 Total 8 pages
www.DataSheet4U.com
STE250N06
N - CHANNEL ENHANCEMENT MODE
POWER MOS TRANSISTOR IN ISOTOP PACKAGE
TYPE
STE250N06
VDSS
60 V
RDS(on)
< 0.004 Ω
ID
250 A
s HIGH CURRENT POWER MODULE
s AVALANCHE RUGGED TECHNOLOGY
(SEE STH80N06 FOR RATING)
s VERY LARGE SOA - LARGE PEAK POWER
CAPABILITY
s EASY TO MOUNT
s SAME CURRENT CAPABILITY FOR THE
TWO SOURCE TERMINALS
s EXTREMELY LOW Rth JUNCTION TO CASE
s VERY LOW DRAIN TO CASE CAPACITANCE
s VERY LOW INTERNAL PARASITIC
INDUCTANCE (TYPICALLY < 5 nH)
s ISOLATED PACKAGE UL RECOGNIZED
(FILE No E81743)
INDUSTRIAL APPLICATIONS:
s SMPS & UPS
s MOTOR CONTROL
s WELDING EQUIPMENT
s OUTPUT STAGE FOR PWM, ULTRASONIC
CIRCUITS
1
2
4
3
ISOTOP
INTERNAL SCHEMATIC DIAGRAM
ABSOLUTE MAXIMUM RATINGS
Symbol
Parameter
VDS Drain-Source Voltage (VGS = 0)
VDGR Drain-Gate Voltage (RGS = 20 kΩ)
VGS Gate-Source Voltage
ID Drain Current (continuous) at Tc = 25 oC
ID Drain Current (continuous) at Tc = 100 oC
IDM(•) Drain Current (pulsed)
Ptot Total Dissipation at Tc = 25 oC
Derating Factor
Tstg Storage Temperature
Tj Max. Operating Junction Temperature
VISO Insulation Withstand Voltage (AC-RMS)
(•) Pulse width limited by safe operating area
May 1995
Value
60
60
± 20
250
155
750
450
3.6
-55 to 150
150
2500
Unit
V
V
V
A
A
A
W
W/oC
oC
oC
V
1/8
1 Page www.DataSheet4U.com
STE250N06
ELECTRICAL CHARACTERISTICS (continued)
SWITCHING OFF
Symbol
tr(Voff)
tf
tc
Parameter
Off-voltage Rise Time
Fall Time
Cross-over Time
Test Conditions
VDD = 40 V ID = 250 A
RG = 4.7 Ω VGS = 10 V
(see test circuit, figure 3)
SOURCE DRAIN DIODE
Symbol
Parameter
Test Conditions
ISD
ISDM(•)
Source-drain Current
Source-drain Current
(pulsed)
VSD (∗) Forward On Voltage
ISD = 250 A VGS = 0
trr Reverse Recovery
Time
Qrr Reverse Recovery
Charge
ISD = 250 A
di/dt = 100 A/µs
VDD = 25 V Tj = 150 oC
(see test circuit, figure 3)
IRRM
Reverse Recovery
Current
(∗) Pulsed: Pulse duration = 300 µs, duty cycle 1.5 %
(•) Pulse width limited by safe operating area
Min.
Typ.
140
745
1000
Max.
Unit
ns
ns
ns
Min.
Typ.
Max.
250
750
Unit
A
A
210
1.31
12.5
1.6
V
ns
µC
A
Safe Operating Area
Thermal Impedance
3/8
3Pages STE250N06
Cross-over Time
www.DataSheet4U.com
Source-drain Diode Forward Characteristics
Fig. 1: Switching Times Test Circuits For
Resistive Load
Fig. 2: Gate Charge Test Circuit
Fig. 3: Test Circuit For Inductive Load Switching
And Diode Recovery Times
6/8
6 Page | |||
ページ | 合計 : 8 ページ | ||
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PDF ダウンロード | [ STE250N06 データシート.PDF ] |
データシートを活用すると、その部品の主な機能と仕様を詳しく理解できます。 ピン構成、電気的特性、動作パラメータ、性能を確認してください。 |
部品番号 | 部品説明 | メーカ |
STE250N06 | N - CHANNEL ENHANCEMENT MODE POWER MOS TRANSISTOR | STMicroelectronics |