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PDF IS42S16100E Data sheet ( Hoja de datos )

Número de pieza IS42S16100E
Descripción 512K Words x 16 Bits x 2 Banks 16Mb SYNCHRONOUS DYNAMIC RAM
Fabricantes Integrated Silicon Solution 
Logotipo Integrated Silicon Solution Logotipo



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IS42S16100E
IS45S16100E
512K Words x 16 Bits x 2 Banks
16Mb SYNCHRONOUS DYNAMIC RAM
JUNE 2010
FEATURES
• Clock frequency: 200, 166, 143 MHz
• Fully synchronous; all signals referenced to a
positive clock edge
• Two banks can be operated simultaneously and
independently
• Dual internal bank controlled by A11 (bank select)
• Single 3.3V power supply
• LVTTL interface
• Programmable burst length
– (1, 2, 4, 8, full page)
• Programmable burst sequence:
Sequential/Interleave
• 2048 refresh cycles every 32ms (Com, Ind, A1
grade) or 16ms (A2 grade)
• Random column address every clock cycle
• Programmable CAS latency (2, 3 clocks)
• Burst read/write and burst read/single write
operations capability
• Burst termination by burst stop and
precharge command
• Byte controlled by LDQM and UDQM
• Packages: 400-mil 50-pin TSOP-II and 60-ball
TF-BGA
• Temperature Grades:
Commercial (0oC to +70oC)
Industrial (-40oC to +85oC)
Automotive A1 (-40oC to +85oC)
Automotive A2 (-40oC to +105oC)
DESCRIPTION
ISSI’s 16Mb Synchronous DRAM IS42/4516100E is
organized as a 524,288-word x 16-bit x 2-bank for
improved performance. The synchronous DRAMs
achieve high-speed data transfer using pipeline
architecture. All inputs and outputs signals refer to the
rising edge of the clock input.
Copyright © 2010 Integrated Silicon Solution, Inc. All rights reserved. ISSI reserves the right to make changes to this specification and its products at any time without
notice. ISSI assumes no liability arising out of the application or use of any information, products or services described herein. Customers are advised to obtain the
latest version of this device specification before relying on any published information and before placing orders for products.
Integrated Silicon Solution, Inc. does not recommend the use of any of its products in life support applications where the failure or malfunction of the product can rea-
sonably be expected to cause failure of the life support system or to significantly affect its safety or effectiveness. Products are not authorized for use in such applica-
tions unless Integrated Silicon Solution, Inc. receives written assurance to its satisfaction, that:
a.) the risk of injury or damage has been minimized;
b.) the user assume all such risks; and
c.) potential liability of Integrated Silicon Solution, Inc is adequately protected under the circumstances
Integrated Silicon Solution, Inc. — www.issi.com
Rev. E
05/18/2010
1

1 page




IS42S16100E pdf
IS42S16100E, IS45S16100E
FUNCTIONAL BLOCK DIAGRAM
CLK
CKE
CS COMMAND
RAS DECODER
CAS &
WE CLOCK
A11 GENERATOR
MODE
REGISTER
11
A10
A9
REFRESH
SELF
A8
CONTROLLER
REFRESH
A7 CONTROLLER
A6
A5
A4
REFRESH
COUNTER
A3
A2
A1
A0
ROW
ADDRESS
11 LATCH
ROW
ADDRESS
BUFFER
11
11
MEMORY CELL
ARRAY
2048
BANK 0
SENSE AMP I/O GATE
256
8
COLUMN DECODER
8 256
SENSE AMP I/O GATE
ROW
ADDRESS
11 BUFFER
11
MEMORY CELL
2048 ARRAY
BANK 1
DATA IN
BUFFER
16 16
DQM
DQ 0-15
DATA OUT
BUFFER
16 16
VDD/VDDQ
GND/GNDQ
Integrated Silicon Solution, Inc. — www.issi.com
Rev.  E
05/18/2010
5

5 Page





IS42S16100E arduino
IS42S16100E, IS45S16100E
COMMANDS
Active Command
CLK
CKE HIGH
CS
RAS
CAS
WE
A0-A9
ROW
A10
A11
ROW
BANK 1
BANK 0
Write Command
CLK
CKE HIGH
CS
RAS
CAS
WE
A0-A9
A10
A11
COLUMN(1)
AUTO PRECHARGE
NO PRECHARGE
BANK 1
BANK 0
Notes:
1. A8-A9 = Don’t Care.
Integrated Silicon Solution, Inc. — www.issi.com
Rev.  E
05/18/2010
Read Command
CLK
CKE HIGH
CS
RAS
CAS
WE
A0-A9
A10
A11
COLUMN (1)
AUTO PRECHARGE
NO PRECHARGE
BANK 1
BANK 0
Precharge Command
CLK
CKE HIGH
CS
RAS
CAS
WE
A0-A9
A10
A11
BANK 0 AND BANK 1
BANK 0 OR BANK 1
BANK 1
BANK 0
Don't Care
11

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