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PDF IRF6631 Data sheet ( Hoja de datos )

Número de pieza IRF6631
Descripción DirectFET Power MOSFET
Fabricantes International Rectifier 
Logotipo International Rectifier Logotipo



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l RoHS compliant containing no lead or bromide 
l Low Profile (<0.6 mm)
l Dual Sided Cooling Compatible 
l Ultra Low Package Inductance
l Optimized for High Frequency Switching 
l Ideal for CPU Core DC-DC Converters
l Optimized for Control FET applications 
l Low Conduction and Switching Losses
l Compatible with existing Surface Mount Techniques 
PD - 97183
IRF6631www.DataSheet4U.com
DirectFET™ Power MOSFET ‚
Typical values (unless otherwise specified)
VDSS
VGS
RDS(on)
RDS(on)
30V max ±20V max 6.0m@ 10V 8.3m@ 4.5V
Qg tot Qgd Qgs2 Qrr Qoss Vgs(th)
12nC 4.4nC 1.1nC 10nC 7.3nC 1.8V
SQ
DirectFET™ ISOMETRIC
Applicable DirectFET Outline and Substrate Outline (see p.7,8 for details)
SQ SX ST
MQ MX MT
MP
Description
The IRF6631 combines the latest HEXFET® Power MOSFET Silicon technology with the advanced DirectFETTM packaging to achieve the
lowest on-state resistance in a package that has the footprint of a MICRO-8 and only 0.6 mm profile. The DirectFET package is compatible
with existing layout geometries used in power applications, PCB assembly equipment and vapor phase, infra-red or convection soldering
techniques, when application note AN-1035 is followed regarding the manufacturing methods and processes. The DirectFET package allows
dual sided cooling to maximize thermal transfer in power systems, improving previous best thermal resistance by 80%.
The IRF6631 balances both low resistance and low charge along with ultra low package inductance to reduce both conduction and switching
losses. The reduced total losses make this product ideal for high efficiency DC-DC converters that power the latest generation of processors
operating at higher frequencies. The IRF6631 has been optimized for parameters that are critical in synchronous buck including Rds(on) and
gate charge to minimize losses in the control FET socket.
Absolute Maximum Ratings
Parameter
VDS Drain-to-Source Voltage
VGS
ID @ TA = 25°C
ID @ TA = 70°C
ID @ TC = 25°C
IDM
EAS
IAR
Gate-to-Source Voltage
eContinuous Drain Current, VGS @ 10V
eContinuous Drain Current, VGS @ 10V
fContinuous Drain Current, VGS @ 10V
gPulsed Drain Current
hSingle Pulse Avalanche Energy
ÃgAvalanche Current
20
ID = 13A
15
10 TJ = 125°C
5
TJ = 25°C
0
3 4 5 6 7 8 9 10
VGS, Gate -to -Source Voltage (V)
Notes:
Fig 1. Typical On-Resistance vs. Gate Voltage
 Click on this section to link to the appropriate technical paper.
‚ Click on this section to link to the DirectFET Website.
ƒ Surface mounted on 1 in. square Cu board, steady state.
www.irf.com
Max.
30
±20
13
10
57
100
13
10
Units
V
A
mJ
A
12.0
10.0
8.0
ID= 10A
VDS= 24V
VDS= 15V
6.0
4.0
2.0
0.0
0
5 10 15 20 25
QG Total Gate Charge (nC)
30
Fig 2. Typical Total Gate Charge vs Gate-to-Source Voltage
„ TC measured with thermocouple mounted to top (Drain) of part.
… Repetitive rating; pulse width limited by max. junction temperature.
† Starting TJ = 25°C, L = 0.24mH, RG = 25, IAS = 10A.
1
02/09/06

1 page




IRF6631 pdf
1000
100
10
TJ = 150°C
TJ = 25°C
TJ = -40°C
1000
100
10
IRF6631
www.DataSheet4U.com
OPERATION IN THIS AREA
LIMITED BY RDS(on)
100µsec
1msec
10msec
1
VGS = 0V
0
0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0 1.1
VSD, Source-to-Drain Voltage (V)
Fig 10. Typical Source-Drain Diode Forward Voltage
60
1
TA = 25°C
TJ = 150°C
Single Pulse
0.1
0.0 0.1
1.0
10 100
VDS, Drain-to-Source Voltage (V)
Fig 11. Maximum Safe Operating Area
2.5
50
40 2.0
30
ID = 50µA
20 1.5
10
0
25 50 75 100 125 150
TC , Case Temperature (°C)
Fig 12. Maximum Drain Current vs. Case Temperature
60
50
40
1.0
-75 -50 -25 0 25 50 75 100 125 150
TJ , Temperature ( °C )
Fig 13. Typical Threshold Voltage vs. Junction
Temperature
ID
TOP 3.1A
4.5A
BOTTOM 10A
30
20
10
www.irf.com
0
25 50 75 100 125 150
Starting TJ , Junction Temperature (°C)
Fig 14. Maximum Avalanche Energy vs. Drain Current
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