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PDF IS41LV16256B Data sheet ( Hoja de datos )

Número de pieza IS41LV16256B
Descripción 256K x 16 (4-MBIT) DYNAMIC RAM WITH EDO PAGE MODE
Fabricantes Integrated Silicon Solution 
Logotipo Integrated Silicon Solution Logotipo



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No Preview Available ! IS41LV16256B Hoja de datos, Descripción, Manual

IS41LV16256B
ISSI®
www.DataSheet4U.com
256K x 16 (4-MBIT) DYNAMIC RAM
WITH EDO PAGE MODE
APRIL 2005
FEATURES
• TTL compatible inputs and outputs
• Refresh Interval: 512 cycles/8 ms
• Refresh Mode : RAS-Only, CAS-before-RAS (CBR),
and Hidden
• JEDEC standard pinout
• Single power supply: 3.3V ± 10%
• Byte Write and Byte Read operation via two CAS
• Lead-free available
DESCRIPTION
The ISSI IS41LV16256B is 262,144 x 16-bit high-perfor-
mance CMOS Dynamic Random Access Memory. Both prod-
ucts offer accelerated cycle access EDO Page Mode. EDO
Page Mode allows 512 random accesses within a single row
with access cycle time as short as 10ns per 16-bit word. The
Byte Write control, of upper and lower byte, makes the
IS41LV16256B ideal for use in 16 and 32-bit wide data bus
systems.
These features make the IS41LV16256B ideally suited for
high band-width graphics, digital signal processing, high-
performance computing systems, and peripheral applications.
KEY TIMING PARAMETERS
The IS41LV16256B is packaged in 40-pin 400-mil SOJ and
TSOP (Type II).
Parameter
-35 -60 Unit
Max. RAS Access Time (tRAC)
Max. CAS Access Time (tCAC)
35 60 ns
11 15 ns
Max. Column Address Access Time (tAA)
18
30
ns
Min. EDO Page Mode Cycle Time (tPC)
14 25 ns
Min. Read/Write Cycle Time (tRC)
60 110 ns
PIN CONFIGURATIONS
40-Pin TSOP (Type II)
40-Pin SOJ
VDD
I/O0
I/O1
I/O2
I/O3
VDD
I/O4
I/O5
I/O6
I/O7
1
2
3
4
5
6
7
8
9
10
NC
NC
WE
RAS
NC
A0
A1
A2
A3
VDD
11
12
13
14
15
16
17
18
19
20
40 GND
39 I/O15
38 I/O14
37 I/O13
36 I/O12
35 GND
34 I/O11
33 I/O10
32 I/O9
31 I/O8
30 NC
29 LCAS
28 UCAS
27 OE
26 A8
25 A7
24 A6
23 A5
22 A4
21 GND
VDD
I/O0
I/O1
I/O2
I/O3
VDD
I/O4
I/O5
I/O6
I/O7
NC
NC
WE
RAS
NC
A0
A1
A2
A3
VDD
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
40 GND
39 I/O15
38 I/O14
37 I/O13
36 I/O12
35 GND
34 I/O11
33 I/O10
32 I/O9
31 I/O8
30 NC
29 LCAS
28 UCAS
27 OE
26 A8
25 A7
24 A6
23 A5
22 A4
21 GND
PIN DESCRIPTIONS
A0-A8
I/O0-15
WE
OE
RAS
UCAS
LCAS
VDD
GND
NC
Address Inputs
Data Inputs/Outputs
Write Enable
Output Enable
Row Address Strobe
Upper Column Address Strobe
Lower Column Address Strobe
Power
Ground
No Connection
Copyright © 2005 Integrated Silicon Solution, Inc. All rights reserved. ISSI reserves the right to make changes to this specification and its products at any time
without notice. ISSI assumes no liability arising out of the application or use of any information, products or services described herein. Customers are advised to
obtain the latest version of this device specification before relying on any published information and before placing orders for products.
Integrated Silicon Solution, Inc. — 1-800-379-4774
Rev. B
04/28/05
1

1 page




IS41LV16256B pdf
IS41LV16256B
ABSOLUTE MAXIMUM RATINGS(1)
Symbol Parameters
Rating
Unit
VT
VDD
IOUT
PD
TA
TSTG
Voltage on Any Pin Relative to GND
Supply Voltage
Output Current
Power Dissipation
Commercial Operation Temperature
Storage Temperature
3.3V
3.3V
-0.5 to 4.6
-0.5 to 4.6
50
1
0 to +70
–55 to +125
V
V
mA
W
°C
°C
Note:
1. Stress greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent
damage to the device. This is a stress rating only and functional operation of the device at these
or any other conditions above those indicated in the operational sections of this specification is not
implied. Exposure to absolute maximum rating conditions for extended periods may affect
reliability.
ISSI®
www.DataSheet4U.com
RECOMMENDED OPERATING CONDITIONS (Voltages are referenced to GND.)
Symbol
VDD
VIH
VIL
TA
Parameter
Supply Voltage
Input High Voltage
Input Low Voltage
Commercial Ambient Temperature
3.3V
3.3V
3.3V
Min.
3.0
2.0
–0.3
0
Typ.
3.3
Max.
3.6
VDD + 0.3
0.8
+70
Unit
V
V
V
°C
CAPACITANCE(1,2)
Symbol Parameter
Max.
CIN1 Input Capacitance: A0-A8
CIN2 Input Capacitance: RAS, UCAS, LCAS, WE, OE
CIO Data Input/Output Capacitance: I/O0-I/O15
5
7
7
Notes:
1. Tested initially and after any design or process changes that may affect these parameters.
2. Test conditions: TA = 25°C, f = 1 MHz,
Unit
pF
pF
pF
Integrated Silicon Solution, Inc. — 1-800-379-4774
Rev. B
04/28/05
5

5 Page





IS41LV16256B arduino
IS41LV16256B
EARLY WRITE CYCLE (OE = DON'T CARE)
RAS
tCRP
UCAS/LCAS
tASR
ADDRESS
Row
WE
I/O
tRAS
tRC
tRCD
tCSH
tRSH
tCAS tCLCH
tRAD
tRAH
tASC
tAR
tRAL
tCAH
tACH
Column
tWCR
tWCS
tCWL
tRWL
tWCH
tWP
tDHR
tDS
tDH
Valid Data
ISSI®
www.DataSheet4U.com
tRP
Row
Don't Care
Integrated Silicon Solution, Inc. — 1-800-379-4774
Rev. B
04/28/05
11

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