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Datasheet ADS1602 PDF ( 特性, スペック, ピン接続図 )

部品番号 ADS1602
部品説明 16-Bit + 2.5MSPS Analog-to-Digital Converter
メーカ Burr-Brown
ロゴ Burr-Brown ロゴ 
プレビュー
Total 26 pages
		
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ADS1602 Datasheet, ADS1602 PDF,ピン配置, 機能
ADS1602
www.DataSheet4U.com
SBAS341B − DECEMBER 2004 − REVISED APRIL 2005
16-Bit, 2.5MSPS
Analog-to-Digital Converter
FEATURES
D High Speed:
Data Rate: 2.5MSPS
Bandwidth: 1.23MHz
D Outstanding Performance:
SNR: 91dB at fIN = 100kHz, −1dBFS
THD: −101dB at fIN = 100kHz, −6dBFS
SFDR: 103dB at fIN = 100kHz, −6dBFS
D Ease-of-Use:
High-Speed 3-Wire Serial Interface
Directly Connects to TMS320 DSPs
On-Chip Digital Filter Simplifies Anti-Alias
Requirements
Simple Pin-Driven Control—No On-Chip
Registers to Program
Selectable On-Chip Voltage Reference
Simultaneous Sampling with Multiple
ADS1602s
D Low Power:
530mW at 2.5MSPS
Power-Down Mode
APPLICATIONS
D Sonar
D Vibration Analysis
D Data Acquisition
VREFP VREFN VMID RBIAS VCAP AVDD DVDD IOVDD
Reference and Bias Circuits
AINP
AINN
∆Σ
Modulator
Linear Phase
FIR Digital Filter
Serial
Interface
ADS1602
AGND
DGND
CLK
SYNC
FSO
FSO
SCLK
SCLK
DOUT
DOUT
OTR
PD
REFEN
DESCRIPTION
The ADS1602 is a high-speed, high-precision,
delta-sigma analog-to-digital converter (ADC)
manufactured on an advanced CMOS process. The
ADS1602 oversampling topology reduces clock jitter
sensitivity during the sampling of high-frequency, large
amplitude signals by a factor of four over that achieved by
Nyquist-rate ADCs. Consequently, signal-to-noise ratio
(SNR) is particularly improved. Total harmonic distortion
(THD) is −101dB, and the spurious-free dynamic range
(SFDR) is 103dB.
Optimized for power and performance, the ADS1602
dissipates only 530mW while providing a full-scale
differential input range of ±3V. Having such a wide input
range makes out-of-range signals unlikely. The OTR pin
indicates if an analog input out-of-range condition does
occur. The differential input signal is measured against the
differential reference, which can be generated internally or
supplied externally on the ADS1602.
The ADS1602 uses an inherently stable advanced
modulator with an on-chip decimation filter. The filter stop
band extends to 38.6MHz, which greatly simplifies the
anti-aliasing circuitry. The modulator samples the input
signal up to 40MSPS, depending on fCLK, while the 16x
decimation filter uses a series of four half-band FIR filter
stages to provide 75dB of stop band attenuation and
0.001dB of passband ripple.
Output data is provided over a simple 3-wire serial
interface at rates up to 2.5MSPS, with a −3dB bandwidth
of 1.23MHz. The output data or its complementary format
directly connects to DSPs such as TI’s TMS320 family,
FPGAs, or ASICs. A dedicated synchronization pin
enables simultaneous sampling with multiple ADS1602s
in multi-channel systems. Power dissipation is set by an
external resistor that allows a reduction in dissipation
when operating at slower speeds. All of the ADS1602
features are controlled by dedicated I/O pins, which
simplify operation by eliminating the need for on-chip
registers.
The high performing, easy-to-use ADS1602 is especially
suitable for demanding measurement applications in
sonar, vibration analysis, and data acquisition. The
ADS1602 is offered in a small, 7mm x 7mm TQFP-48
package and is specified from −40°C to +85°C.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments
semiconductor products and disclaimers thereto appears at the end of this data sheet.
All other trademarks are the property of their respective owners.
PRODUCTION DATA information is current as of publication date. Products
conform to specifications per the terms of Texas Instruments standard warranty.
Production processing does not necessarily include testing of all parameters.
Copyright 2004−2005, Texas Instruments Incorporated
www.ti.com

1 Page



ADS1602 pdf, ピン配列
ADS1602
www.ti.com
SBAS341B − DECEMBwERw2w0.0D4atRaESVhIeSeEDt4AUP.cRoILm2005
ELECTRICAL CHARACTERISTICS
All specifications at TA = −40°C to +85°C, AVDD = 5V, DVDD = IOVDD = 3V, fCLK = 40MHz, External VREF = +3V, VCM = +1.45V,
and RBIAS = 37k, unless otherwise noted.
ADS1602
PARAMETER
TEST CONDITIONS
MIN TYP MAX
Analog Input
Differential input voltage (VIN)
(AINP − AINN)
0dBFS
±VREF
Common-mode input voltage (VCM)
(AINP + AINN) / 2
1.45
Absolute input voltage
(AINP or AINN with respect to AGND)
−0.1 4.6
Dynamic Specifications
Data Rate
ǒ ǓfCLK
2.50 40MHz
Signal-to-noise ratio (SNR)
Total harmonic distortion (THD)
Signal-to-noise + distortion (SINAD)
Spurious-free dynamic range (SFDR)
Intermodulation distortion (IMD)
Aperture delay
fIN = 10kHz, −1dBFS
fIN = 10kHz, −3dBFS
fIN = 10kHz, −6dBFS
fIN = 100kHz, −1dBFS
fIN = 100kHz, −3dBFS
fIN = 100kHz, −6dBFS
fIN = 800kHz, −1dBFS
fIN = 800kHz, −3dBFS
fIN = 800kHz, −6dBFS
fIN = 10kHz, −1dBFS
fIN = 10kHz, −3dBFS
fIN = 10kHz, −6dBFS
fIN = 100kHz, −1dBFS
fIN = 100kHz, −3dBFS
fIN = 100kHz, −6dBFS
fIN = 800kHz, −1dBFS
fIN = 800kHz, −3dBFS
fIN = 800kHz, −6dBFS
fIN = 10kHz, −1dBFS
fIN = 10kHz, −3dBFS
fIN = 10kHz, −6dBFS
fIN = 100kHz, −1dBFS
fIN = 100kHz, −3dBFS
fIN = 100kHz, −6dBFS
fIN = 800kHz, −1dBFS
fIN = 800kHz, −3dBFS
fIN = 800kHz, −6dBFS
fIN = 10kHz, −1dBFS
fIN = 10kHz, −3dBFS
fIN = 10kHz, −6dBFS
fIN = 100kHz, −1dBFS
fIN = 100kHz, −3dBFS
fIN = 100kHz, −6dBFS
fIN = 800kHz, −1dBFS
fIN = 800kHz, −3dBFS
fIN = 800kHz, −6dBFS
f1 = 995kHz, −6dBFS
f2 = 1005kHz, −6dBFS
92
87 90
84 87
91
87 89
84 86
91
89
86
−94
−106
−92
−108
−93
−90
−96 −90
−101
−92
−116
−114
−110
89
85 90
82 87
87
85 88
82 86
91
89
86
95
90 107
93 112
91
90 96
93 103
120
119
114
94
4
UNIT
V
V
V
MSPS
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
ns
3


3Pages


ADS1602 電子部品, 半導体
ADS1602
SBAS341B − DECEMBER 2004 − REVISED APRIL 2005
DEFINITIONS
Absolute Input Voltage
Absolute input voltage, given in volts, is the voltage of each
analog input (AINN or AINP) with respect to AGND.
Aperture Delay
Aperture delay is the delay between the rising edge of CLK
and the sampling of the input signal.
Common-Mode Input Voltage
Common-mode input voltage (VCM) is the average voltage
of the analog inputs:
(AINP ) AINN)
2
Differential Input Voltage
Differential input voltage (VIN) is the voltage difference
between the analog inputs (AINP−AINN).
Differential Nonlinearity (DNL)
DNL, given in least-significant bits of the output code
(LSB), is the maximum deviation of the output code step
sizes from the ideal value of 1LSB.
Full-Scale Range (FSR)
FSR is the difference between the maximum and minimum
measurable input signals (FSR = 2VREF).
Gain Error
Gain error, given in %, is the error of the full-scale input
signal with respect to the ideal value.
Gain Error Drift
Gain error drift, given in ppm/_C, is the drift over
temperature of the gain error. The gain error is specified as
the larger of the drift from ambient (T = 25_C) to the
minimum or maximum operating temperatures.
Integral Nonlinearity (INL)
INL, given in least-significant bits of the output code (LSB),
is the maximum deviation of the output codes from a best
fit line.
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Intermodulation Distortion (IMD)
IMD, given in dB, is measured while applying two input
signals of the same magnitude, but with slightly different
frequencies. It is calculated as the difference between the
rms amplitude of the input signal to the rms amplitude of
the peak spurious signal.
Offset Error
Offset Error, given in % of FSR, is the output reading when
the differential input is zero.
Offset Error Drift
Offset error drift, given in ppm of FSR/_C, is the drift over
temperature of the offset error. The offset error is specified
as the larger of the drift from ambient (T = 25_C) to the
minimum or maximum operating temperatures.
Signal-to-Noise Ratio (SNR)
SNR, given in dB, is the ratio of the rms value of the input
signal to the sum of all the frequency components below
fCLK/2 (the Nyquist frequency) excluding the first six
harmonics of the input signal and the dc component.
Signal-to-Noise and Distortion (SINAD)
SINAD, given in dB, is the ratio of the rms value of the input
signal to the sum of all the frequency components below
fCLK/2 (the Nyquist frequency) including the harmonics of
the input signal but excluding the dc component.
Spurious-Free Dynamic Range (SFDR)
SFDR, given in dB, is the difference between the rms
amplitude of the input signal to the rms amplitude of the
peak spurious signal.
Total Harmonic Distortion (THD)
THD, given in dB, is the ratio of the sum of the rms value
of the first six harmonics of the input signal to the rms value
of the input signal.
6

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