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LC80101MのメーカーはSanyo Semicon Deviceです、この部品の機能は「VICS LSI」です。 |
部品番号 | LC80101M |
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部品説明 | VICS LSI | ||
メーカ | Sanyo Semicon Device | ||
ロゴ | ![]() |
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このページの下部にプレビューとLC80101Mダウンロード(pdfファイル)リンクがあります。 Total 9 pages
![]() Ordering number : EN54384465
CMOS LSI
LC80101M
VICS LSI
Overview
The LC80101M is a special-purpose descrambler LSI for
use in VICS systems. FM multiplexed service data that
has had VICS center scrambling applied can be
descrambled and received by inserting this LSI in the
serial interface between the LC72700E and the application
CPU. This architecture also supports reception of regular
transmissions that have not been scrambled. Note that
sample evaluation and product manufacture using this LSI
require a contract with the VICS Center organization.
Functions
• VICS scrambled/unscrambled recognition circuit
• Dedicated VICS descrambler circuit
• CPU interface circuit (CCB: serial)
Package Dimensions
unit: mm
3091A-MFP28
[LC80101M]
SANYO: MFP28
Specifications
Absolute Maximum Ratings
Parameter
Maximum supply voltage
Input voltage
Output voltage
Allowable power dissipation
Operating temperature
Storage temperature
Symbol
VDD max
VIN1
VIN2
VOUT1
VOUT2
Pdmax
Topr
Tstg
Conditions
Ratings
VDD
The CL2, CE2, DI2, RST2, BACKUP, INT-R1, and DI1 pins
–0.3 to +7.0
–0.3 to +7.0
Input pins other than VIN1
The DO2 pin
–0.3 to VDD +0.3
–0.3 to +7.0
Output pins other than VOUT1
Ta ≤ 85°C
–0.3 to VDD +0.3
200
–40 to +85
–55 to +125
Unit
V
V
V
V
V
mW
°C
°C
• CCB is a trademark of SANYO ELECTRIC CO., LTD.
• CCB is SANYO’s original bus format and all the bus
addresses are controlled by SANYO.
SANYO Electric Co.,Ltd. Semiconductor Bussiness Headquarters
TOKYO OFFICE Tokyo Bldg., 1-10, 1 Chome, Ueno, Taito-ku, TOKYO, 110 JAPAN
53096HA (OT) No. 5438-1/9
1 Page ![]() ![]() LC80101M
Pin Assignments and Functions
Pin No.
Pin
Function overview
TEST1
Test pin 1 (Must be connected to ground or left open in normal operation.)
1
TEST2
Test pin 2 (Must be connected to ground or left open in normal operation.)
9
TEST3
Test pin 3 (Must be connected to ground or left open in normal operation.)
19
TEST4
Test pin 4 (Must be connected to ground or left open in normal operation.)
27
TESTON
Test pin (Must be connected to ground in normal operation.)
13
Rd: Input pin internal pull-down resistor
5 DI1 Inputs the output of the LC72700E pin 32. An external pull-down resistor is
required. See the following page.
20
BACKUP
Input that selects normal operation when high and backup mode when low.
Clock input for the CCB serial interface
21 CL2
22
CE2
Control input for the CCB serial interface
23 DI2 Data input for the CCB serial interface
26
RST2
System reset input (negative logic)
4
INT-R1
Inputs the output of the LC72700E pin 35.
Rd: Input pin internal pull-down resistor
Input or output circuit type
6
DO1
Output to the LC72700E pin 31 input
7
CE1
Output to the LC72700E pin 30 input
8 CL1 Output to the LC72700E pin 29 input
25
INT-R2
Outputs an output data interrupt to the external CPU
24
DO2
Data output for the CCB serial interface
2
FILCK1
System clock generator input
3
FICLK2
System clock generator output
Rf: External feedback resistor, 510 kΩ to 1.5 MΩ (typical: 1 MΩ)
28
14
10, 11,
12, 15,
16, 17
18
VDD Power supply (+4.5 to 5.5 V)
VSS Ground connection
NC No connection pins. These pins must be left open.
No. 5438-3/9
3Pages ![]() ![]() Serial Data Output
LC80101M
No. 5438-6/9
6 Page | |||
ページ | 合計 : 9 ページ | ||
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PDF ダウンロード | [ LC80101M データシート.PDF ] |
データシートを活用すると、その部品の主な機能と仕様を詳しく理解できます。 ピン構成、電気的特性、動作パラメータ、性能を確認してください。 |
部品番号 | 部品説明 | メーカ |
LC80101M | VICS LSI | ![]() Sanyo Semicon Device |