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LC78625E の電気的特性と機能
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LC78625EのメーカーはSanyo Semicon Deviceです、この部品の機能は「Compact Disc Player DSP」です。 |
製品の詳細 ( Datasheet PDF )
| 部品番号 | LC78625E |
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| 部品説明 | Compact Disc Player DSP | ||
| メーカ | Sanyo Semicon Device | ||
| ロゴ |  |
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このページの下部にプレビューとLC78625Eダウンロード（pdfファイル）リンクがあります。 Total 30 pages
Ordering number : EN5502
CMOS LSI
LC78625E
Compact Disc Player DSP
Overview
The LC78625E is a CMOS LSI that implements the signal
processing and servo control required by compact disc
players, laser discs, CD-V, CD-I and related products. The
LC78625E provides several types of signal processing,
including demodulation of the optical pickup EFM signal,
de-interleaving, error detection and correction, and digital
filters that can help reduce the cost of CD player units. It
also processes a rich set of servo system commands sent
from the control microprocessor. It also incorporates an
EFM-PLL circuit and a one-bit D/A converter.
This LSI is an improved version of the LC78620E. In
addition to supporting low-voltage operation, on/off
control of the de-emphasis function and use of the
bilingual function have been enabled in certain additional
modes.
Functions
• The LC78625E takes an HF signal as input, digitizes
(slices) that signal at a precise level, converts that signal
to an EFM signal, and generates a PLL clock with an
average frequency of 4.3218 MHz by comparing the
phases of that signal and an internal VCO.
• A precise reference clock and the necessary internal
timings are generated using an external 16.9344 MHz
crystal oscillator.
• Disc motor speed control using a frame phase difference
signal generated from the playback clock and the
reference clock
• Frame synchronization signal detection, protection, and
interpolation to assure stable data readout
• EFM signal demodulation and conversion to 8-bit
symbol data
• Subcode data separation from the EFM demodulated
signal and output of that data to an external
microprocessor
• Subcode Q signal output (LSB first) to a microprocessor
over the serial interface after performing a CRC error
check
• Demodulated EFM signal buffering in internal RAM to
handle up to ±4 frames of disc rotational jitter
• Demodulated EFM signal reordering in the prescribed
order for data unscrambling and de-interleaving
• Error detection, correction, and flag processing (error
correction scheme: dual C1 plus dual C2 correction)
• The LC78625E sets the C2 flags based on the C1 flags
and a C2 check, and then performs signal interpolation
or muting depending on the C2 flags. The interpolation
circuit uses a quadruple interpolation scheme. The
output value converges to the muting level when four or
more consecutive C2 flags occur.
Package Dimensions
unit: mm
3174-QFP80E
[LC78625E]
SANYO: QFP80E
SANYO Electric Co.,Ltd. Semiconductor Bussiness Headquarters
TOKYO OFFICE Tokyo Bldg., 1-10, 1 Chome, Ueno, Taito-ku, TOKYO, 110 JAPAN
22897HA (OT) No. 5502-1/35
1 Page  
Pin Assignment
LC78625E
Specifications
Absolute Maximum Ratings at Ta = 25°C, VSS = 0 V
Parameter
Maximum supply voltage
Maximum input voltage
Maximum output voltage
Allowable power dissipation
Operating temperature
Storage temperature
Symbol
VDD max
VIN
VOUT
Pd max
Topr
Tstg
Conditions
Ratings
VSS – 0.3 to +7.0
VSS – 0.3 to VDD + 0.3
VSS – 0.3 to VDD + 0.3
300
–20 to +75
–40 to +125
Unit
V
V
V
mW
°C
°C
Allowable Operating Ranges at Ta = 25°C, VSS = 0 V
Parameter
Supply voltage
Input high-level voltage
Input low-level voltage
Data setup time
Data hold time
High-level clock pulse width
Low-level clock pulse width
Data read access time
Symbol
VDD (1)
VDD (2)
VIH (1)
VIH (2)
VIL (1)
VIL (2)
tSU
tHD
tWH
tWL
tRAC
Conditions
VDD, XVDD, LVDD, RVDD, VVDD :
At normal playback speed
VDD, XVDD, LVDD, RVDD, VVDD :
At 2× playback speed
DEFI, FZD, ASDACK/P0, ASFIN/P1,
ASDEPC/P2, ASLRCK/P3, COIN, RES, HFL,
TES, SBCK, RWC, CQCK, TAI, TEST1 to
TEST5, DEMO, CS
EFMIN
DEFI, FZD, ASDACK/P0, ASFIN/P1,
ASDEPC/P2, ASLRCK/P3, COIN, RES, HFL,
TES, SBCK, RWC, CQCK, TAI, TEST1 to
TEST5, DEMO, CS
EFMIN
COIN, RWC : Figure 1
COIN, RWC : Figure 1
SBCK, CQCK : Figuires 1, 2 and 3
SBCK, CQCK : Figuires 1, 2 and 3
SQOUT, PW : Figuires 2 and 3
min
3.0
4.5
0.7 VDD
0.6 VDD
0
0
400
400
400
400
0
Ratings
typ
max
5.5
Unit
V
5.5 V
VDD
V
VDD
V
0.3 VDD
V
0.4 VDD
V
ns
ns
ns
ns
400 ns
Continued on next page.
No. 5502-3/35
3Pages 
LC78625E
Figure 4 General-Purpose Port Input Timing
Figure 5 General-Purpose Port Output Timing
No. 5502-6/35
6 Page | |||
| ページ | 合計 : 30 ページ | ||
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PDF ダウンロード | [ LC78625E データシート.PDF ] | |
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データシートを活用すると、その部品の主な機能と仕様を詳しく理解できます。 ピン構成、電気的特性、動作パラメータ、性能を確認してください。 |
共有リンク
Link :| 部品番号 | 部品説明 | メーカ |
| LC78625 | Compact Disc Player DSP | Sanyo Semicon Device |
| LC78625E | Compact Disc Player DSP | Sanyo Semicon Device |