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LC78622E の電気的特性と機能

LC78622EのメーカーはSanyo Semicon Deviceです、この部品の機能は「Compact Disc Player DSP」です。


製品の詳細 ( Datasheet PDF )

部品番号 LC78622E
部品説明 Compact Disc Player DSP
メーカ Sanyo Semicon Device
ロゴ Sanyo Semicon Device ロゴ 




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LC78622E Datasheet, LC78622E PDF,ピン配置, 機能
Ordering number : EN5467
CMOS LSI
LC78622E
Compact Disc Player DSP
Overview
The LC78622E is a CMOS LSI that implements the signal
processing and servo control required by compact disc
players. At the same time as providing an EFM PLL
circuit, a 1-bit D/A converter, and an analog low-pass
filter the LC78622E realizes an optimal cost-performance
tradeoff for low-end players by strictly limiting
functionality to basic signal-processing and servo system
functionality. The LC78622E signal-processing system
provides demodulation of the EFM signal from the pickup,
de-interleaving, error detection and correction, and digital
filters that can prove useful in reducing the cost of end
products. The LC78622E servo control system processes
servo commands sent from the control microprocessor.
Functions
• Input signal processing: The LC78622E takes an HF
signal as input, digitizes (slices) that signal at a precise
level, converts that signal to an EFM signal, and
generates a PLL clock with an average frequency of
4.3218 MHz by comparing the phases of that signal and
an internal VCO.
• Precise reference clock and necessary internal timing
generation using an external 16.9344 MHz crystal
oscillator
• Disk motor speed control using a frame phase difference
signal generated from the playback clock and the
reference clock
• Frame synchronization signal detection, protection and
interpolation to assure stable data readout
• EFM signal demodulation and conversion to 8-bit
symbol data
• Subcode data separation from the EFM demodulated
signal and output of that data to an external
microprocessor
• Subcode Q signal output to a microprocessor over the
serial I/O interface after performing a CRC error check
(LSB first)
• Demodulated EFM signal buffering in internal RAM to
handle up to ±4 frames of disk rotational jitter
• Demodulated EFM signal reordering in the prescribed
order for data unscrambling and de-interleaving
• Error detection, correction, and flag processing (error
correction scheme: dual C1 plus dual C2 correction)
• The LC78622E sets the C2 flags based on the C1 flags
and a C2 check, and then performs signal interpolation
or muting depending on the C2 flags. The interpolation
circuit uses a dual-interpolation scheme. The previous
value is held if the C2 flags indicate errors two or more
times consecutively.
• Support for command input from a control
microprocessor: commands include track jump, focus
start, disk motor start/stop, muting on/off and track
count (8 bit serial input)
• Built-in digital output circuits.
• Arbitrary track counting to support high-speed data
access
• D/A converter outputs with data continuity improved by
4× oversampling digital filters.
• Built-in third-order ∑∆ D/A converters (An analog low-
pass filter is built in.)
• Built-in digital attenuator (8 bits – alpha, 239 steps)
• Built-in digital de-emphasis
• Zero cross muting
• Supports the implementation of a double-speed dubbing
function.
• Support for bilingual applications.
• General-purpose I/O ports: 5 pins
Features
• 5 V single-voltage power supply
• Supports low-voltage operation (3.0 V, minimum)
Package Dimensions
unit: mm
3159-QFP64E
[LC78622E]
SANYO: QFP64E
SANYO Electric Co.,Ltd. Semiconductor Bussiness Headquarters
TOKYO OFFICE Tokyo Bldg., 1-10, 1 Chome, Ueno, Taito-ku, TOKYO, 110 JAPAN
93096HA (OT) No. 5467-1/29

1 Page





LC78622E pdf, ピン配列
LC78622E
Specifications
Absolute Maximum Ratings at Ta = 25°C, VSS = 0 V
Parameter
Maximum supply voltage
Input voltage
Output voltage
Allowable power dissipation
Operating temperature
Storage temperature
Symbol
VDD max
VIN
VOUT
Pd max
Topr
Tstg
Conditions
Ratings
VSS – 0.3 to VSS + 7.0
VSS – 0.3 to VDD + 0.3
VSS – 0.3 to VDD + 0.3
300
–20 to +75
–40 to +125
Unit
V
V
V
mW
°C
°C
Allowable Operating Ranges at Ta = 25°C, VSS = 0 V
Parameter
Supply voltage
Input high level voltage
Input low level voltage
Data setup time
Data hold time
High level clock pulse width
Low level clock pulse width
Data read access time
Command transfer time
Subcode Q read enable time
Subcode read cycle time
Subcode read enable time
Port input data setup time
Port input data hold time
Port input clock setup time
Port output data delay time
Input level
Operating frequency range
Crystal oscillator frequency
Symbol
VDD (1)
VDD (2)
VIH (1)
VIH (2)
VIL (1)
VIL (2)
tSU
tHD
tWH
tWL
tRAC
tRWC
tSQE
tSC
tSE
tCSU
tCHD
tRCQ
tCDD
VIN (1)
VIN (2)
fop
fX
Conditions
VDD, XVDD, LVDD, RVDD, VVDD:
During normal-speed playback
VDD, XVDD, LVDD, RVDD, VVDD:
During double-speed playback
DEFI, COIN, RES, HFL, TES, SBCK, RWC, CQCK,
TAI, TEST1 to TEST5, CS, CONT1 to CONT5
EFMIN
DEFI, COIN, RES, HFL, TES, SBCK, RWC, CQCK,
TAI, TEST1 to TEST5, CS, CONT1 to CONT5
EFMIN
COIN, RWC: Figure 1
COIN, RWC: Figure 1
SBCK, CQCK: Figures 1, 2 and 3
SBCK, CQCK: Figures 1, 2 and 3
SQOUT, PW: Figures 2 and 3
RWC: Figure 1
WRQ: Figure 2, with no RWC signal
SFSY: Figure 3
SFSY: Figure 3
CONT1 to CONT5, RWC: Figure 4
CONT1 to CONT5, RWC: Figure 4
RWC, CQCK: Figure 4
CONT1 to CONT5, RWC: Figure 5
EFMIN: Slice level control
XIN: Capacitor-coupled input
EFMIN
XIN, XOUT
min
3.0
typ
max
5.5
Unit
V
3.6 5.5 V
0.7 VDD
0.6 VDD
0
0
400
400
400
400
0
1000
400
400
400
100
1.0
1.0
11.2
136
16.9344
VDD
VDD
0.3 VDD
0.4 VDD
400
1200
10
V
V
V
V
ns
ns
ns
ns
ns
ns
ms
µs
ns
ns
ns
ns
ns
Vp-p
Vp-p
MHz
MHz
No. 5480-3/29


3Pages


LC78622E 電子部品, 半導体
LC78622E
Figure 4 General-Purpose Port Input Timing
Figure 5 General-Purpose Port Output Timing
No. 5480-6/29

6 Page



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共有リンク

Link :


部品番号部品説明メーカ
LC78622E

Compact Disc Player DSP

Sanyo Semicon Device
Sanyo Semicon Device
LC78622NE

Compact Disc Player DSP

Sanyo Semicon Device
Sanyo Semicon Device


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