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HYMD264G726A4M-L の電気的特性と機能

HYMD264G726A4M-LのメーカーはHynix Semiconductorです、この部品の機能は「Low Profile Registered DDR SDRAM DIMM」です。


製品の詳細 ( Datasheet PDF )

部品番号 HYMD264G726A4M-L
部品説明 Low Profile Registered DDR SDRAM DIMM
メーカ Hynix Semiconductor
ロゴ Hynix Semiconductor ロゴ 




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HYMD264G726A4M-L Datasheet, HYMD264G726A4M-L PDF,ピン配置, 機能
DESCRIPTION
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Low Profile Registered DDR SDRAM DIMM
HYMD264G726A(L)4M-M/K/H/L
Preliminary
Hynix HYMD264G726A(L)4M-M/K/H/L series is Low Profile registered 184-pin double data rate Synchronous DRAM
Dual In-Line Memory Modules (DIMMs) which are organized as 64Mx72 high-speed memory arrays. Hynix
HYMD264G726A(L)4M-M/K/H/L series consists of eighteen 64Mx4 DDR SDRAM in 400mil TSOP II packages on a
184pin glass-epoxy substrate. Hynix HYMD264G726A(L)4M-M/K/H/L series provide a high performance 8-byte inter-
face in 5.25" width form factor of industry standard. It is suitable for easy interchange and addition.
Hynix HYMD264G726A(L)4M-M/K/H/L series is designed for high speed of up to 133MHz and offers fully synchronous
operations referenced to both rising and falling edges of differential clock inputs. While all addresses and control
inputs are latched on the rising edges of the clock, Data, Data strobes and Write data masks inputs are sampled on
both rising and falling edges of it. The data paths are internally pipelined and 2-bit prefetched to achieve very high
bandwidth. All input and output voltage levels are compatible with SSTL_2. High speed frequencies, programmable
latencies and burst lengths allow variety of device operation in high performance memory system.
Hynix HYMD264G726A(L)4M-M/K/H/L series incorporates SPD(serial presence detect). Serial presence detect function
is implemented via a serial 2,048-bit EEPROM. The first 128 bytes of serial PD data are programmed by Hynix to iden-
tify DIMM type, capacity and other the information of DIMM and the last 128 bytes are available to the customer.
FEATURES
• 512MB (64M x 72) Low Profile Registered DDR
DIMM based on 64Mx4 DDR SDRAM
• JEDEC Standard 184-pin dual in-line memory module
(DIMM)
• Error Check Correction (ECC) Capability
• Registered inputs with one-clock delay
• Phase-lock loop (PLL) clock driver to reduce loading
• 2.5V +/- 0.2V VDD and VDDQ Power supply
• All inputs and outputs are compatible with SSTL_2
interface
• Fully differential clock operations (CK & /CK) with
100MHz/125MHz/133MHz
• Programmable CAS Latency 2 / 2.5 supported
• Programmable Burst Length 2 / 4 / 8 with both
sequential and interleave mode
• tRAS Lock-out function supported
• Internal four bank operations with single pulsed RAS
• Auto refresh and self refresh supported
• 8192 refresh cycles / 64ms
ORDERING INFORMATION
Part No.
HYMD264G726A(L)4M-M
HYMD264G726A(L)4M-K
HYMD264G726A(L)4M-H
HYMD264G726A(L)4M-L
Power Supply
VDD=2.5V
VDDQ=2.5V
Clock Frequency
133MHz (*DDR266:2-2-2)
133MHz (*DDR266A)
133MHz (*DDR266B)
100MHz (*DDR200)
Interface
Form Factor
SSTL_2
184pin Low Profile Registered
DIMM
5.25 x 1.2 x 0.15 inch
* JEDEC Defined Specifications compliant
This document is a general product description and is subject to change without notice. Hynix Semiconductor does not assume any
responsibility for use of circuits described. No patent licenses are implied.
Rev. 0.2/May. 02
1

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HYMD264G726A4M-L pdf, ピン配列
www.DataSheet4U.com
HYMD264G726A(L)4M-M/K/H/L
FUNCTIONAL BLOCK DIAGRAM
VSS
/RCS0
DQS0
DQS1
DQ0
DQ1
DQ2
DQ3
DQS2
DQ0
DQ1
DQ2
DQ3
DQS3
DQ8
DQ9
DQ10
DQ11
DQS4
DQ16
DQ17
DQ18
DQ19
DQS5
DQ24
DQ25
DQ26
DQ27
DQS6
DQ32
DQ33
DQ34
DQ35
DQS7
DQ40
DQ41
DQ42
DQ43
DQS8
DQ48
DQ49
DQ50
DQ51
CB0
CB1
CB2
CB3
/CS0
BA0-BA1
A0-A12
/RAS
/CAS
CKE0
/WE
PCK
/PCK
DQS /CS DM
I/O 0
I/O 1
I/O 2
D0
I/O 3
DQS /CS DM
I/O 0
I/O 1
I/O 2
I/O 3
D1
DQS /CS DM
I/O 0
I/O 1
I/O 2
I/O 3
D2
DQS /CS DM
I/O 0
I/O 1
I/O 2
D3
I/O 3
DQS /CS DM
I/O 0
I/O 1
I/O 2
D4
I/O 3
DQS /CS DM
I/O 0
I/O 1
I/O 2
D5
I/O 3
DQS /CS DM
I/O 0
I/O 1
I/O 2
D6
I/O 3
DQS /CS DM
I/O 0
I/O 1
I/O 2
D7
I/O 3
DQS /CS DM
I/O 0
I/O 1
I/O 2
D8
I/O 3
DQS9
DQS10
DQ4
DQ5
DQ6
DQ7
DQS11
DQ12
DQ13
DQ14
DQ15
DQS12
DQ20
DQ21
DQ22
DQ23
DQ28
DQ29
DQ30
DQ31
DQS13
DQ36
DQ37
DQ38
DQ39
DQS14
DQ44
DQ45
DQ46
DQ47
DQS15
DQS16
DQ52
DQ53
DQ54
DQ55
DQS17
DQ60
DQ61
DQ62
DQ63
CB4
CB5
CB6
CB7
DQS /CS DM
I/O 0
I/O 1
I/O 2
D9
I/O 3
DQS
I/O 0
I/O 1
I/O 2
I/O 3
/CS DM
D10
DQS
I/O 0
I/O 1
I/O 2
I/O 3
/CS DM
D11
DQS
I/O 0
I/O 1
I/O 2
I/O 3
/CS DM
D12
DQS
I/O 0
I/O 1
I/O 2
I/O 3
/CS DM
D13
DQS
I/O 0
I/O 1
I/O 2
I/O 3
/CS DM
D14
DQS
I/O 0
I/O 1
I/O 2
I/O 3
/CS DM
D15
DQS
I/O 0
I/O 1
I/O 2
I/O 3
/CS DM
D16
DQS
I/O 0
I/O 1
I/O 2
I/O 3
/CS DM
D17
SCL
WP
Serial PD
A0 A1 A2
SA0 SA1 SA2
SDA
VDDSPD
VDDQ
VDD
VREF
VSS
VDDID
..
==
.
=
.
.... . =. .
SPD
D0 - D17
D0 - D17
D0 - D17
D0 - D17
Strap:see Note 4
/RCS0 -->/CS0 : SDRAMs D0-D17
RBA0-RBA1--> : BA0-BA1:SDRAMs D0-D17
R RA0 -RA12 -->A0 - A12 : SDRAMs D0 - D17
E /RRAS --> /RAS : SDRAMs D0 - D17
G
/RCAS --> /CAS : SDRAMs D0 - D17
RCKE0 --> CKE : SDRAMs D0 - D17
/RWE --> /WE : SDRAMs D0 - D17
/RESET
Notes:
1. DQ-to-I/O wiring may be changed within a byte
2. DQ/DQS/DM/CKE/CS relationships must be
maintained as shown.
3. DQ/DQS resistors should be 18 Ohms.
4. VDDID strap connections(for memory device VDD, VDDQ);
Strap out :(open) : VDD=VDDQ
Strap In (Vss) : VDD=VDDQ
5. Address and control resistors should be 22 Ohms
CK0, /CK0 --------- PLL*
* Wire per clock loading table/wiring diagrams
Rev. 0.2/May. 02
3


3Pages


HYMD264G726A4M-L 電子部品, 半導体
CAPACITANCE (TA=25oC, f=100MHz )
www.DataSheet4U.com
HYMD264G726A(L)4M-M/K/H/L
Parameter
Pin
Input Capacitance
A0 ~ A12, BA0, BA1
Input Capacitance
Input Capacitance
/RAS, /CAS, /WE
CKE0
Input Capacitance
Input Capacitance
CS0
CK0, /CK0
Data Input / Output Capacitance
Data Input / Output Capacitance
DQ0 ~ DQ63, DQS0 ~ DQS17
CB0 ~ CB7
Symbol
CIN1
CIN2
CIN3
CIN4
CIN5
CIO1
CIO2
Min
TBD
TBD
TBD
TBD
TBD
TBD
TBD
Max
TBD
TBD
TBD
TBD
TBD
TBD
TBD
Unit
pF
pF
pF
pF
pF
pF
pF
Note :
1. VDD = min. to max., VDDQ = 2.3V to 2.7V, VODC = VDDQ/2, VOpeak-to-peak = 0.2V
2. Pins not under test are tied to GND.
3. These values are guaranteed by design and are tested on a sample basis only.
OUTPUT LOAD CIRCUIT
Output
VTT
RT=50
Zo=50
CL=30pF
VREF
Rev. 0.2/May. 02
6

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共有リンク

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部品番号部品説明メーカ
HYMD264G726A4M-H

Low Profile Registered DDR SDRAM DIMM

Hynix Semiconductor
Hynix Semiconductor
HYMD264G726A4M-K

Low Profile Registered DDR SDRAM DIMM

Hynix Semiconductor
Hynix Semiconductor
HYMD264G726A4M-L

Low Profile Registered DDR SDRAM DIMM

Hynix Semiconductor
Hynix Semiconductor
HYMD264G726A4M-M

Low Profile Registered DDR SDRAM DIMM

Hynix Semiconductor
Hynix Semiconductor


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