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IS61WV51216BLL PDF Datasheet ( 特性, スペック, ピン接続図 )

部品番号 IS61WV51216BLL
部品説明 512K x 16 HIGH-SPEED ASYNCHRONOUS CMOS STATIC RAM
メーカ Integrated Silicon Solution
ロゴ Integrated Silicon Solution ロゴ 



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IS61WV51216BLL Datasheet, IS61WV51216BLL PDF,ピン配置, 機能
IS61WV51216ALL
IS61WV51216BLL
IS64WV51216BLL
www.DataSheet4U.com
512K x 16 HIGH-SPEED ASYNCHRONOUS
CMOS STATIC RAM WITH 3.3V SUPPLY
OCTOBER 2009
FEATURES
• High-speed access times:
8, 10, 20 ns
• High-performance, low-power CMOS process
• Multiple center power and ground pins for greater
noise immunity
• Easy memory expansion with CE and OE op-
tions
CE power-down
• Fully static operation: no clock or refresh
required
• TTL compatible inputs and outputs
• Single power supply
VDD 1.65V to 2.2V (IS61WV51216ALL)
speed = 20ns for VDD 1.65V to 2.2V
VDD 2.4V to 3.6V (IS61/64WV51216BLL)
speed = 10ns for VDD 2.4V to 3.6V
speed = 8ns for VDD 3.3V + 5%
• Packages available:
– 48-ball miniBGA (9mm x 11mm)
– 44-pin TSOP (Type II)
• Industrial and Automotive Temperature Support
• Lead-free available
• Data control for upper and lower bytes
FUNCTIONAL BLOCK DIAGRAM
DESCRIPTION
The ISSI IS61WV51216ALL/BLL and IS64WV51216BLL
are high-speed, 8M-bit static RAMs organized as 512K
words by 16 bits. It is fabricated using ISSI's high-perform-
ance CMOS technology. This highly reliable process coupled
with innovative circuit design techniques, yields high-perfor-
mance and low power consumption devices.
When CE is HIGH (deselected), the device assumes a
standby mode at which the power dissipation can be
reduced down with CMOS input levels.
Easy memory expansion is provided by using Chip Enable
and Output Enable inputs, CE and OE. The active LOW
Write Enable (WE) controls both writing and reading of the
memory. A data byte allows Upper Byte (UB) and Lower
Byte (LB) access.
The device is packaged in the JEDEC standard 44-pin
TSOP Type II and 48-pin Mini BGA (9mm x 11mm).
A0-A18
DECODER
512K x 16
MEMORY ARRAY
VDD
GND
I/O0-I/O7
Lower Byte
I/O8-I/O15
Upper Byte
I/O
DATA
CIRCUIT
COLUMN I/O
CE
OE
WE
CONTROL
CIRCUIT
UB
LB
Copyright © 2006 Integrated Silicon Solution, Inc. All rights reserved. ISSI reserves the right to make changes to this specification and its products at any time
without notice. ISSI assumes no liability arising out of the application or use of any information, products or services described herein. Customers are advised to
obtain the latest version of this device specification before relying on any published information and before placing orders for products.
Integrated Silicon Solution, Inc. — www.issi.com
Rev. F
10/01/09
1

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IS61WV51216BLL

512K x 16 HIGH-SPEED ASYNCHRONOUS CMOS STATIC RAM

Integrated Silicon Solution
Integrated Silicon Solution

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