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ADP122 の電気的特性と機能

ADP122のメーカーはAnalog Devicesです、この部品の機能は「(ADP122 / ADP123) CMOS Linear Regulator」です。


製品の詳細 ( Datasheet PDF )

部品番号 ADP122
部品説明 (ADP122 / ADP123) CMOS Linear Regulator
メーカ Analog Devices
ロゴ Analog Devices ロゴ 




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ADP122 Datasheet, ADP122 PDF,ピン配置, 機能
5.5 V Input, 300 mA, Low Quiescent
Current, CMOS Linear Regulator
ADP122/ADP123
FEATURES
Input voltage supply range: 2.3 V to 5.5 V
300 mA maximum output current
Fixed and adjustable output voltage versions
Very low dropout voltage: 85 mV at 300 mA load
Low quiescent current: 45 μA at no load
Low shutdown current: <1 μA
Initial accuracy: ±1% accuracy
Up to 31 fixed-output voltage options available from
1.75 V to 3.3 V
Adjustable-output voltage range
0.8 V to 5.0 V (ADP123)
Excellent PSRR performance: 60 dB at 100 kHz
Excellent load/line transient response
Optimized for small 1.0 μF ceramic capacitors
Current limit and thermal overload protection
Logic controlled enable
Compact, 5-lead TSOT package
APPLICATIONS
Digital camera and audio devices
Portable and battery-powered equipment
Automatic meter reading (AMR) meters
GPS and location management units
Medical instrumentation
Point-of-sale equipment
GENERAL DESCRIPTION
www.DaTthaeShAeDetP41U2.c2o/AmDP123 are low quiescent current, low dropout
linear regulators. They are designed to operate from an input
voltage between 2.3 V and 5.5 V and to provide up to 300 mA of
output current. The low 85 mV dropout voltage at a 300 mA load
improves efficiency and allows operation over a wide input
voltage range.
The low 170 μA of quiescent current at full load makes the ADP122
ideal for battery-operated portable equipment.
The ADP122 is capable of 31 fixed output voltages from 1.75 V
to 3.3 V. The ADP123 is the adjustable version of the device and
allows the output voltage to be set between 0.8 V and 5.0 V by
an external voltage divider.
TYPICAL APPLICATION CIRCUIT
VIN = 2.3V TO 5.5V
CIN
1µF
1 VIN VOUT 5
ADP122
2 GND
VOUT = 1.8V
COUT
1µF
ON
OFF
3 EN
NC 4
Figure 1. ADP122 with Fixed Output Voltage
VIN = 2.3V TO 5.5V
CIN
1µF
1 VIN VOUT 5
ADP123
2 GND
VOUT = 0.5V(1 + R1/R2)
COUT
1µF
R1
ON
OFF
3 EN
ADJ 4
R2
Figure 2. ADP 123 with Adjustable Output Voltage
The ADP122/ADP123 are specifically designed for stable operation
with tiny 1 μF ceramic input and output capacitors to meet the
requirements of high performance, space constrained applications.
The ADP122/ADP123 have an internal soft start that gives a
constant start-up time of 350 μs. Short-circuit protection and
thermal overload protection circuits prevent damage in adverse
conditions. The ADP122/ADP123 are available in a tiny, 5-lead
TSOT package for the smallest footprint solution to meet a
variety of portable applications.
Rev. 0
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
www.analog.com
Fax: 781.461.3113
©2009 Analog Devices, Inc. All rights reserved.

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ADP122 pdf, ピン配列
ADP122/ADP123
SPECIFICATIONS
Unless otherwise noted, VIN = (VOUT + 0.3 V) or 2.3 V, whichever is greater; ADJ connected to VOUT; IOUT = 10 mA; CIN = 1.0 μF;
COUT = 1.0 μF; TA = 25°C.
Table 1.
Parameter
INPUT VOLTAGE RANGE
OPERATING SUPPLY CURRENT1
SHUTDOWN CURRENT
OUTPUT VOLTAGE ACCURACY2
Fixed Output
Adjustable Output
LINE REGULATION
LOAD REGULATION3
ADJ INPUT BIAS CURRENT
DROPOUT VOLTAGE4
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START-UP TIME5
CURRENT LIMIT THRESHOLD6
THERMAL SHUTDOWN
Thermal Shutdown Threshold
Thermal Shutdown Hysteresis
EN INPUT
EN Input Logic High
EN Input Logic Low
EN Input Leakage Current
UNDERVOLTAGE LOCKOUT
Input Voltage Rising
Input Voltage Falling
Hysteresis
Symbol
VIN
IGND
ISD
VOUT
∆VOUT/∆VIN
∆VOUT/∆IOUT
ADJI-BIAS
VDROPOUT
tSTART-UP
ILIMIT
Test Conditions
IOUT = 0 μA
IOUT = 0 μA, TJ = −40°C to +125°C
IOUT = 1 mA
IOUT = 1 mA, TJ = −40°C to +125°C
IOUT = 150 mA
IOUT = 150 mA, TJ = −40°C to +125°C
IOUT = 300 mA
IOUT = 300 mA, TJ = −40°C to +125°C
EN = GND
EN = GND, TJ = −40°C to +125°C
IOUT = 10 mA
100 μA < IOUT < 300 mA, VIN = (VOUT + 0.5 V) to 5.5 V,
TJ = −40°C to +125°C
IOUT = 10 mA
100 μA < IOUT < 300 mA, VIN = 2.3 V to 5.5 V,
TJ = −40°C to +125°C
VIN = VIN = 2.3 V to 5.5 V, TJ = −40°C to +125°C
IOUT = 1 mA to 300 mA
IOUT = 1 mA to 300 mA , TJ = −40°C to +125°C
2.3 V ≤ VIN ≤ 5.5 V, ADJ connected to VOUT
IOUT = 10 mA, VOUT > 2.3 V
IOUT = 10 mA, TJ = −40°C to +125°C
IOUT = 150 mA, VOUT > 2.3 V
IOUT = 150 mA, TJ = −40°C to +125°C
IOUT = 300 mA, VOUT > 2.3V
IOUT = 300 mA, TJ = −40°C to +125°C
VOUT = 3.0 V
Min
2.3
−1
−2
0.495
0.490
−0.05
350
Typ Max Unit
5.5 V
45 μA
105 μA
60 μA
120 μA
130 μA
190 μA
170 μA
240 μA
0.1 μA
1 μA
+1 %
+1.5 %
0.500 0.505 V
0.500 0.5075 V
0.0005
15
+0.05
0.001
%/V
%/mA
%/mA
nA
3 mV
5 mV
45 mV
75 mV
85 mV
150 mV
350 μs
500 650 mA
TSSD
TSSD-HYS
TJ rising
150 °C
15 °C
VIH
VIL
VI-LEAKAGE
UVLO
UVLORISE
UVLOFALL
UVLOHYS
2.3 V ≤ VIN ≤ 5.5 V
2.3 V ≤ VIN ≤ 5.5 V
EN = VIN or GND
EN = VIN or GND, TJ = −40°C to +125°C
TJ = −40°C to +125°C
TJ = −40°C to +125°C
TA = 25°C
1.2 V
0.4 V
0.1 μA
1 μA
2.1 V
1.5 V
125 mV
Rev. 0 | Page 3 of 20


3Pages


ADP122 電子部品, 半導体
ADP122/ADP123
PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS
VIN 1
5 VOUT
ADP122
GND 2 TOP VIEW
(Not to Scale)
EN 3
4 NC
NC = NO CONNECT
Figure 3. ADP122 Fixed Output Pin Configuration
VIN 1
5 VOUT
ADP123
GND 2 TOP VIEW
(Not to Scale)
EN 3
4 ADJ
Figure 4. ADP123 Adjustable Output Pin Configuration
Table 5. Pin Function Descriptions
Pin No.
ADP122 ADP123 Mnemonic Description
1 1 VIN
Regulator Input Supply. Bypass VIN to GND with a capacitor of at least 1 μF.
2
2
GND
Ground.
3 3 EN
Enable Input. Drive EN high to turn on the regulator; drive EN low to turn off the regulator. For
automatic startup, connect EN to VIN.
N/A 4 ADJ Output Voltage Adjust Input. Connect the midpoint of an external divider from VOUT to GND to this
pin to set the output voltage.
4 N/A NC
Not Connected Internally.
5
5
VOUT
Regulated Output Voltage. Bypass VOUT to GND with a capacitor of at least 1 μF.
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Rev. 0 | Page 6 of 20

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