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IR3505 の電気的特性と機能

IR3505のメーカーはInternational Rectifierです、この部品の機能は「XPHASE3TM PHASE IC」です。


製品の詳細 ( Datasheet PDF )

部品番号 IR3505
部品説明 XPHASE3TM PHASE IC
メーカ International Rectifier
ロゴ International Rectifier ロゴ 




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IR3505 Datasheet, IR3505 PDF,ピン配置, 機能
IR3505
DATA SHEET
XPHASE3TM PHASE IC
DESCRIPTION
The IR3505 Phase IC combined with an IR XPhase3TM Control IC provides a full featured and flexible way to
implement power solutions for the latest high performance CPUs and ASICs. The “Control” IC provides
overall system control and interfaces with any number of “Phase” ICs which each drive and monitor a single
phase of a multiphase converter. The XPhase3TM architecture results in a power supply that is smaller, less
expensive, and easier to design while providing higher efficiency than conventional approaches.
FEATURES
7V/2A gate drivers (4A GATEL sink current)
Support converter output voltage up to 5.1 V (Limited to VCCL-1.4V)
Support loss-less inductor current sensing
Feed-forward voltage mode control
Integrated boot-strap synchronous PFET
Only four IC related external components per phase
3 wire analog bus connects Control and Phase ICs (VDAC, Error Amp, ISHARE)
3 wire digital bus for accurate daisy-chain phase timing control without external components
Debugging function isolates phase IC from the converter
Self-calibration of PWM ramp, current sense amplifier, and current share amplifier
Single-wire bidirectional average current sharing
Small thermally enhanced 16L 3 x 3mm MLPQ package
RoHS compliant
APPLICATION CIRCUIT
12V
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CCS
RCS
6 Wire
Bus to
Control
IC
1 ISHARE
SW 12
2
3
IR3505
DACIN
GATEH
PHASE
LGND IC
BOOST
11
10
CBST
4 PHSIN
VCCL 9
VCCL
Page 1 of 19
CVCCL
CIN
L
VOUT+
COUT
VOUT-
Mar 04th, 2008

1 Page





IR3505 pdf, ピン配列
IR3505
RECOMMENDED OPERATING CONDITIONS FOR RELIABLE OPERATION WITH MARGIN
8.0V VCC 16V, 4.75V VCCL 7.5V, 0.5V V(DACIN) 1.6V, 250kHz CLKIN 9MHz, 250kHz PHSIN
1.5MHz, 0 oC TJ 125 oC
ELECTRICAL CHARACTERISTICS
The electrical characteristics involve the spread of values guaranteed within the recommended operating conditions.
Typical values represent the median values, which are related to 25°C. CGATEH = 3.3nF, CGATEL = 6.8nF (unless
otherwise specified).
PARAMETER
TEST CONDITION
MIN TYP MAX UNIT
Gate Drivers
GATEH Source Resistance BOOST – SW = 7V. Note 1
1.0 2.5
GATEH Sink Resistance
BOOST – SW = 7V. Note 1
1.0 2.5
GATEL Source Resistance VCCL – PGND = 7V. Note 1
1.0 2.5
GATEL Sink Resistance
VCCL – PGND = 7V. Note 1
0.4 1.0
GATEH Source Current
BOOST=7V, GATEH=2.5V, SW=0V.
2.0 A
GATEH Sink Current
BOOST=7V, GATEH=2.5V, SW=0V.
2.0 A
GATEL Source Current
VCCL=7V, GATEL=2.5V, PGND=0V.
2.0 A
GATEL Sink Current
VCCL=7V, GATEL=2.5V, PGND=0V.
4.0 A
GATEH Rise Time
BOOST – SW = 7V, measure 1V to 4V
transition time
5 10 ns
GATEH Fall Time
BOOST - SW = 7V, measure 4V to 1V
transition time
5 10 ns
GATEL Rise Time
VCCL – PGND = 7V, Measure 1V to 4V
transition time
10 20 ns
GATEL Fall Time
VCCL – PGND = 7V, Measure 4V to 1V
transition time
5 10 ns
GATEL low to GATEH high
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BOOST = VCCL = 7V, SW = PGND = 0V,
measure time from GATEL falling to 1V to
GATEH rising to 1V
10 20 40 ns
GATEH low to GATEL high BOOST = VCCL = 7V, SW = PGND = 0V,
delay
measure time from GATEH falling to 1V to
GATEL rising to 1V
10 20 40 ns
Disable Pull-Down
Resistance
Note 1
30 80 130 k
Clock
CLKIN Threshold
Compare to V(VCCL)
40 45 57 %
CLKIN Bias Current
CLKIN Phase Delay
CLKIN = V(VCCL)
Measure time from CLKIN<1V to
GATEH>1V
-0.5 0.0 0.5 µA
40 75 125 ns
PHSIN Threshold
Compare to V(VCCL)
35 50 55 %
PHSOUT Propagation
Delay
Measure time from CLKIN > (VCCL * 50% )
4
15
35 ns
to PHSOUT > (VCCL *50%). 10pF @125 oC
PHSIN Pull-Down
Resistance
30 100 170 k
PHSOUT High Voltage
I(PHSOUT) = -10mA, measure VCCL –
PHSOUT
1 0.6
V
PHSOUT Low Voltage
I(PHSOUT) = 10mA
0.4 1
V
Page 3 of 19
Mar 04th, 2008


3Pages


IR3505 電子部品, 半導体
IR3505
PIN DESCRIPTION
PIN# PIN SYMBOL
1 ISHARE
2 DACIN
3 LGND
4 PHSIN
5 PHSOUT
6 CLKIN
7 PGND
8 GATEL
9 VCCL
10 BOOST
11 GATEH
12 SW
13 VCC
14 CSIN+
15 CSIN-
16 EAIN
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PIN DESCRIPTION
Output of the Current Sense Amplifier is connected to this pin through a 3k
resistor. Voltage on this pin is equal to V(DACIN) + 32.5 [V(CSIN+) – V(CSIN-)].
Connecting all ISHARE pins together creates a share bus which provides an
indication of the average current being supplied by all the phases. The signal is used
by the Control IC for voltage positioning and over-current protection. OVP mode is
initiated if the voltage on this pin rises above V(VCCL)- 0.8V.
Reference voltage input from the Control IC. The Current Sense signal and PWM
ramp is referenced to the voltage on this pin.
Ground for internal IC circuits. IC substrate is connected to this pin.
Phase clock input.
Phase clock output.
Clock input.
Return for low side driver and reference for GATEH non-overlap comparator.
Low-side driver output and input to GATEH non-overlap comparator.
Supply for low-side driver. Internal bootstrap synchronous PFET is connected from
this pin to the BOOST pin.
Supply for high-side driver. Internal bootstrap synchronous PFET is connected
between this pin and the VCCL pin.
High-side driver output and input to GATEL non-overlap comparator.
Return for high-side driver and reference for GATEL non-overlap comparator.
Supply for internal IC circuits.
Non-Inverting input to the current sense amplifier, and input to debug comparator.
Inverting input to the current sense amplifier, and input to synchronous rectification
disable comparator.
PWM comparator input from the error amplifier output of Control IC. Body Braking
mode is initiated if the voltage on this pin is less than V(DACIN).
Page 6 of 19
Sept 26th, 2007

6 Page



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