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PDF ISL8088 Data sheet ( Hoja de datos )
| Número de pieza | ISL8088 | |
| Descripción | Dual 800mA Low Quiescent Current 2.25MHz High Efficiency Synchronous Buck Regulator | |
| Fabricantes | Intersil Corporation | |
| Logotipo |  |
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Dual 800mA Low Quiescent Current 2.25MHz High
Efficiency Synchronous Buck Regulator
ISL8088
The ISL8088 is a high efficiency, dual synchronous
step-down DC/DC regulator that can deliver up to 800mA
continuous output current per channel. The supply
voltage range of 2.75V to 5.5V allows the use of a single
Li+ cell, three NiMH cells or a regulated 5V input. The
current mode control architecture enables very low duty
cycle operation at high frequency with fast transient
response and excellent loop stability. The ISL8088
operates at 2.25MHz switching frequency allowing the
use of small, low cost inductors and capacitors. Each
channel is optimized for generating an output voltage as
low as 0.6V.
The ISL8088 has a user configurable mode of
operation-forced PWM mode and PFM/PWM mode. The
forced PWM mode operation reduces noise and RF
interference while the PFM mode operation provides high
efficiency by reducing switching losses at light loads. In
PFM mode of operation, both channels draw a total
quiescent current of only 30µA hence enabling high light
load efficiency in order to maximize battery life.
The ISL8088 offers a 1ms Power-Good (PG) to monitor
both output at power-up. When shutdown, ISL8088
discharges the outputs capacitor. Other features include
internal digital soft-start, enable for power sequence,
overcurrent protection, and thermal shutdown. The
ISL8088 is offered in a 3mmx3mm 10 Ld DFN package
with 1mm maximum height. The complete converter
occupies less than 1.8cm2 area.
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Efficiency Characteristics Curve
100
90
Features
• Internal Current Mode Compensation
• 100% Maximum Duty Cycle for Lowest Dropout
• Selectable Forced PWM Mode and PFM Mode
• External Synchronization up to 4MHz
• Start-up with Pre-biased Output
• Soft-Stop Output Discharge During Disabled
• Internal Digital Soft-Start - 2ms
• Power-Good (PG) Output with 1ms Delay
Applications*(see page 17)
• DC/DC POL Modules
• µC/µP, FPGA and DSP Power
• Plug-in DC/DC Modules for Routers and Switchers
• Test and Measurement Systems
• Li-ion Battery Power Devices
• Bar Code Readers
Pin Configuration
ISL8088
(10 LD 3X3 DFN)
TOP VIEW
80
70
60
50
40
0.0
2.5VOUT-PFM
1.8VOUT-PFM
2.5VOUT-PWM
1.8VOUT- PWM
VIN = 5V
0.1 0.2 0.3 0.4 0.5 0.6 0.7
OUTPUT LOAD (A)
0.8
FB1 1
EN1 2
VIN 3
LX1 4
NC 5
11 PGND
10 FB2
9 EN2
8 PG
7 LX2
6 SYNC
September 21, 2009
FN6858.0
1 CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-468-3774 | Intersil (and design) is a registered trademark of Intersil Americas Inc.
Copyright Intersil Americas Inc. 2009. All Rights Reserved
All other trademarks mentioned are the property of their respective owners.
1 page  
ISL8088
Electrical Specifications
Unless otherwise noted, all parameter limits are established over the recommended
operating conditions: TA = -40°C to +85°C, VIN = 2.75V to 5.5V, EN1 = EN2 = VIN, SYNC =
0V, L = 2.2µH, C1 = 10µF, C2 = C4 = 10µF, IOUT1 = IOUT2 = 0A to 800mA. (Typical values
are at TA = +25°C, VIN = 3.6V). Boldface limits apply over the operating temperature
range, -40°C to +85°C. (Continued)
PARAMETER
SYMBOL
TEST CONDITIONS
MIN
MAX
(Note 6) TYP (Note 6) UNITS
N-Channel MOSFET ON-Resistance
LX_ Maximum Duty Cycle
VIN = 5.5V, IO = 200mA
VIN = 2.75V, IO = 200mA
180 350
320 450
100
mΩ
mΩ
%
PWM Switching Frequency
Synchronization Range
FS
1.8 2.25 2.7
2.7 4
MHz
MHz
LX Minimum On-Time
SYNC = 0 (forced PWM mode)
100
ns
Soft Discharge Resistance
PG
RDIS_ EN = LOW
80 100 130
Ω
Output Low Voltage
Sinking 1mA, VFB = 0.5V
0.3 V
PG Pull-up Resistor
1 MΩ
Internal PGOOD Low Rising Threshold
Percentage of nominal regulation
voltage
88 92 96
%
Internal PGOOD Low Falling Threshold
Percentage of nominal regulation
voltage
82 89 91
%
Delay Time (Rising Edge)
1 ms
Internal PGOOD Delay Time (Falling Edge)
EN1, EN2, SYNC
12
µs
Logic Input Low
0.4 V
Logic Input High
1.4 V
SYNC Logic Input Leakage Current
Enable Logic Input Leakage Current
Thermal Shutdown
ISYNC
IEN_
Pulled up to 5.5V
0.1 1
0.1 1
150
µA
µA
°C
Thermal Shutdown Hysteresis
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NOTE:
25 °C
6. Parameters with MIN and/or MAX limits are 100% tested at +25°C, unless otherwise specified. Temperature limits established
by characterization and are not production tested.
5 FN6858.0
September 21, 2009
5 Page 
ISL8088
Typical Operating Performance
(Unless otherwise noted) operating conditions are:
TA = +25°C, VIN = 2.75V to 5.5V, EN = VIN, L1 = L2 = 2.2µH,
C1 = 10µF, C2 = C4 = 10µF, VOUT1 = 2.5V, VOUT2 = 1.8V,
IOUT1 = IOUT2 = 0A to 800mA. (Continued)
200ns/DIV
LX1 2V/DIV
200ns/DIV
LX1 2V/DIV
SYNCH 2V/DIV
IL1 0.5A/DIV
VOUT1 RIPPLE 20mV/DIV
FIGURE 31. CH1 STEADY STATE OPERATION AT NO
LOAD (PFM) WITH FREQUENCY = 4MHz
SYNCH 2V/DIV
IL1 0.5A/DIV
VOUT1 RIPPLE 20mV/DIV
FIGURE 32. CH1 STEADY STATE OPERATION AT FULL
LOAD (PFM) WITH FREQUENCY = 4MHz
200ns/DIV
LX2 2V/DIV
200ns/DIV
LX2 2V/DIV
SYNCH 2V/DIV
VOUT2 RIPPLE 20mV/DIV
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IL2 0.5A/DIV
FIGURE 33. CH2 STEADY STATE OPERATION AT NO
LOAD (PFM) WITH FREQUENCY = 4MHz
SYNCH 2V/DIV
IL2 0.5A/DIV
VOUT2 RIPPLE 20mV/DIV
FIGURE 34. CH2 STEADY STATE OPERATION AT FULL
LOAD (PFM) WITH FREQUENCY = 4MHz
100ns/DIV
LX1 5V/DIV
100ns/DIV
LX1 5V/DIV
LX2 5V/DIV
LX2 5V/DIV
SYNCH 5V/DIV
SYNCH 5V/DIV
VOUT1 RIPPLE 20mV/DIV
VOUT2 RIPPLE 20mV/DIV
FIGURE 35. CH1 AND CH2 STEADY STATE OPERATION
AT NO LOAD (PFM) WITH
FREQUENCY = 4MHz
VOUT1 RIPPLE 20mV/DIV
VOUT2 RIPPLE 20mV/DIV
FIGURE 36. CH1 AND CH2 STEADY STATE OPERATION
AT FULL LOAD (PFM) WITH
FREQUENCY = 4MHz
11 FN6858.0
September 21, 2009
11 Page | ||
| Páginas | Total 18 Páginas | |
| PDF Descargar | [ Datasheet ISL8088.PDF ] | |
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