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ADP125 の電気的特性と機能

ADP125のメーカーはAnalog Devicesです、この部品の機能は「(ADP124 / ADP125) CMOS LINEAR REGULATOR W/31 FIXED-OUTPUT VOLTAGES」です。


製品の詳細 ( Datasheet PDF )

部品番号 ADP125
部品説明 (ADP124 / ADP125) CMOS LINEAR REGULATOR W/31 FIXED-OUTPUT VOLTAGES
メーカ Analog Devices
ロゴ Analog Devices ロゴ 




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ADP125 Datasheet, ADP125 PDF,ピン配置, 機能
5.5 V Input, 500 mA, Low Quiescent
Current, CMOS Linear Regulators
ADP124/ADP125
FEATURES
Input voltage supply range: 2.3 V to 5.5 V
500 mA maximum output current
Fixed and adjustable output voltage versions
1% initial accuracy
Up to 31 fixed-output voltage options available
from 1.75 V to 3.3 V
Adjustable-output voltage range from 0.8 V to 5.0 V
Very low dropout voltage: 130 mV
Low quiescent current: 45 μA
Low shutdown current: <1 μA
Excellent PSRR performance: 60 dB at 100 kHz
Excellent load/line transient response
Optimized for small 1.0 μF ceramic capacitors
Current limit and thermal overload protection
Logic controlled enable
Compact 8-lead exposed paddle MSOP package
APPLICATIONS
Digital camera and audio devices
Portable and battery-powered equipment
Automatic meter reading (AMR) meters
GPS and location management units
Medical instrumentation
Point of load power
TYPICAL APPLICATION CIRCUITS
VOUT = 3.3V
C2
1 VOUT VIN 8
ADP124
2 VOUT VIN 7
VIN = 5.5V
C1
3
VOUT
SENSE
4 GND
NC 6
ON
EN 5
OFF
Figure 1. ADP124 with Fixed Output Voltage
VOUT = 3.3V
C2 R1
R2
1 VOUT VIN 8
ADP125
2 VOUT VIN 7
VIN = 5.5V
C1
3 ADJ
4 GND
NC 6
ON
EN 5
OFF
Figure 2. ADP 125 with Adjustable Output Voltage
GENERAL DESCRIPTION
www.DaTthaeShAeDetP41U2.c4o/AmDP125 are low quiescent current, low dropout
linear regulators. They are designed to operate from an input
voltage between 2.3 V and 5.5 V and to provide up to 500 mA of
output current. The low 130 mV dropout voltage at a 500 mA
load improves efficiency and allows operation over a wide input
voltage range.
The low 210 μA of quiescent current with a 500 mA load makes the
ADP124/ADP125 ideal for battery-operated portable equipment.
The ADP124 is capable of 31 fixed-output voltages from 1.75 V
to 3.3 V. The ADP125 is the adjustable version of the device and
allows the output voltage to be set between 0.8 V and 5.0 V by
an external voltage divider.
The ADP124/ADP125 are specifically designed for stable operation
with tiny 1 μF ceramic input and output capacitors to meet the
requirements of high performance, space constrained applications.
The ADP124/ADP125 have an internal soft start that gives a
constant start-up time of 350 μs. Short-circuit protection and
thermal overload protection circuits prevent damage in adverse
conditions. The ADP124/ADP125 are available in an 8-lead
exposed paddle MSOP package. When compared with the
standard MSOP package, the exposed paddle MSOP package
has lower thermal resistance (θJA). The lower thermal resistance
package allows the ADP124/ADP125 to meet the needs of a
variety of portable applications while minimizing the rise in
junction temperature.
Rev. 0
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
www.analog.com
Fax: 781.461.3113
©2009 Analog Devices, Inc. All rights reserved.

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ADP125 pdf, ピン配列
ADP124/ADP125
SPECIFICATIONS
Unless otherwise noted, VIN = (VOUT + 0.5 V) or 2.3 V, whichever is greater; ADJ connected to VOUT; IOUT = 10 mA; CIN = 1.0 μF;
COUT = 1.0 μF; TA = 25°C.
Table 1.
Parameter
INPUT VOLTAGE RANGE
OPERATING SUPPLY CURRENT1
SHUTDOWN CURRENT
OUTPUT VOLTAGE ACCURACY2
Fixed Output
Adjustable Output
LINE REGULATION
LOAD REGULATION3
ADJ INPUT BIAS CURRENT
DROPOUT VOLTAGE4
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START-UP TIME5
CURRENT LIMIT THRESHOLD6
THERMAL SHUTDOWN
Thermal Shutdown Threshold
Thermal Shutdown Hysteresis
EN INPUT
EN Input Logic High
EN Input Logic Low
EN Input Leakage Current
UNDERVOLTAGE LOCKOUT
Input Voltage Rising
Input Voltage Falling
Hysteresis
Symbol
VIN
IGND
ISD
VOUT
Test Conditions
IOUT = 0 μA
IOUT = 0 μA, TJ = −40°C to +125°C
IOUT = 1 mA
IOUT = 1 mA, TJ = −40°C to +125°C
IOUT = 250 mA
IOUT = 250 mA, TJ = −40°C to +125°C
IOUT = 500 mA
IOUT = 500 mA, TJ = −40°C to +125°C
EN = GND
EN = GND, TJ = −40°C to +125°C
Min Typ
2.3
45
60
160
210
0.1
IOUT = 10 mA
100 μA < IOUT < 500 mA, VIN = (VOUT + 0.5 V) to 5.5 V,
TJ = −40°C to +125°C
−1
−2
Max Unit
5.5 V
μA
105 μA
μA
120 μA
μA
210 μA
μA
280 μA
μA
1 μA
+1 %
+1.5 %
∆VOUT/∆VIN
∆VOUT/∆IOUT
ADJI-BIAS
VDROPOUT
tSTART-UP
ILIMIT
IOUT = 10 mA
100 μA < IOUT < 500 mA, VIN = 2.3 V to 5.5 V,
TJ = −40°C to +125°C
VIN = VIN = 2.3 V to 5.5 V, TJ = −40°C to +125°C
IOUT = 1 mA to 500 mA
IOUT = 1 mA to 500 mA, TJ = −40°C to +125°C
2.3 V ≤ VIN ≤ 5.5 V, ADJ connected to VOUT
IOUT = 10 mA, VOUT > 2.3 V
IOUT = 10 mA, TJ = −40°C to +125°C
IOUT = 250 mA, VOUT > 2.3 V
IOUT = 250 mA, TJ = −40°C to +125°C
IOUT = 500 mA, VOUT > 2.3V
IOUT = 500 mA, TJ = −40°C to +125°C
VOUT = 3.0 V
0.495 0.500 0.505 V
0.485 0.500 0.515 V
−0.05
0.0005
15
+0.05
0.001
%/V
%/mA
%/mA
nA
3
65
130
350
550 750
5
120
230
1000
mV
mV
mV
mV
mV
mV
μs
mA
TSSD
TSSD-HYS
TJ rising
150 °C
15 °C
VIH
VIL
VI-LEAKAGE
UVLO
UVLORISE
UVLOFALL
UVLOHYS
2.3 V ≤ VIN ≤ 5.5 V
2.3 V ≤ VIN ≤ 5.5 V
EN = VIN or GND
EN = VIN or GND, TJ = −40°C to +125°C
TJ = −40°C to +125°C
TJ = −40°C to +125°C
TA = 25°C
1.2
0.1
V
0.4 V
μA
1 μA
2.1 V
1.5 V
125 mV
Rev. 0 | Page 3 of 20


3Pages


ADP125 電子部品, 半導体
ADP124/ADP125
PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS
VOUT 1
VOUT 2
VOUT SENSE 3
GND 4
ADP124
TOP VIEW
(Not to Scale)
8 VIN
7 VIN
6 NC
5 EN
NC = NO CONNECT
Figure 3. ADP124 Fixed Output Pin Configuration
VOUT 1
VOUT 2
ADJ 3
GND 4
ADP125
TOP VIEW
(Not to Scale)
8 VIN
7 VIN
6 NC
5 EN
NC = NO CONNECT
Figure 4. ADP125 Adjustable Output Pin Configuration
Table 5. Pin Function Descriptions
Mnemonic
Pin No. ADP124
ADP125
1 VOUT
VOUT
2 VOUT
VOUT
3 VOUT SENSE N/A
N/A ADJ
4 GND
5 EN
GND
EN
6 NC
7 VIN
8 VIN
EP
NC
VIN
VIN
EP
Description
Regulated Output Voltage. Bypass VOUT to GND with a 1 μF or greater capacitor.
Regulated Output Voltage. Bypass VOUT to GND with a 1 μF or greater capacitor.
Feedback Node for the Error Amplifier. Connect to VOUT.
Feedback Node for the Error Amplifier. Connect the midpoint of an external divider from
VOUT to GND to this pin to set the output voltage.
Ground.
Enable Input. Drive EN high to turn on the regulator; drive EN low to turn off the regulator.
For automatic startup, connect EN to VIN.
No Connect. This pin is not connected internally.
Regulator Input Supply. Bypass VIN to GND with a 1 μF or greater capacitor.
Regulator Input Supply. Bypass VIN to GND with a 1 μF or greater capacitor.
The exposed pad must be connected to ground.
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Rev. 0 | Page 6 of 20

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