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AD10465 の電気的特性と機能

AD10465のメーカーはAnalog Devicesです、この部品の機能は「65 MSPS A/D Converter」です。


製品の詳細 ( Datasheet PDF )

部品番号 AD10465
部品説明 65 MSPS A/D Converter
メーカ Analog Devices
ロゴ Analog Devices ロゴ 




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AD10465 Datasheet, AD10465 PDF,ピン配置, 機能
Data Sheet
Dual Channel, 14-Bit, 65 MSPS A/D Converter
with Analog Input Signal Conditioning
AD10465
FEATURES
Dual, 65 MSPS minimum sample rate
Channel-to-channel matching, ±0.5% gain error
Channel-to-channel isolation, >90 dB
DC-coupled signal conditioning included
Selectable bipolar input voltage range
(±0.5 V, ±1.0 V, ±2.0 V)
Gain flatness up to 25 MHz: <0.2 dB
80 dB spurious-free dynamic range
Twos complement output format
3.3 V or 5 V CMOS-compatible output levels
1.75 W per channel
Industrial and military grade
The AD10465 uses innovative high density circuit design and laser
trimmed, thin film resistor networks to achieve exceptional
matching and performance, while still maintaining excellent
isolation and providing for significant board area savings.
The AD10465 operates with ±5.0 V supplies for the analog
signal conditioning with a separate 5.0 V supply for the analog-
to-digital conversion and 3.3 V digital supply for the output
stage. Each channel is completely independent, allowing
operation with independent encode and analog inputs. The
AD10465 also offers the user a choice of analog input signal
ranges to further minimize additional external signal
conditioning, while remaining general-purpose.
APPLICATIONS
Phased array receivers
Communications receivers
FLIR processing
Secure communications
GPS antijamming receivers
Multichannel, multimode receivers
GENERAL DESCRIPTION
The AD10465 is packaged in a 68-lead ceramic leaded chip
carrier package, footprint-compatible with the earlier
generation AD10242 (12-bit, 40 MSPS) and AD10265 (12-bit,
65 MSPS). Manufacturing is done on the Analog Devices Mil-
38534 Qualified Manufacturers Line (QML) and components
are available up to Class-H (−40°C to +85°C). The AD6644
internal components are manufactured on Analog Devices’ high
speed complementary bipolar process (XFCB).
The AD10465 is a full channel ADC solution with on-module
PRODUCT HIGHLIGHTS
signal conditioning for improved dynamic performance and
fully matched channel-to-channel performance. The module
includes two wide dynamic range AD6644 ADCs. Each
1. Guaranteed sample rate of 65 MSPS.
2. Input amplitude options, user configurable.
AD6644 has a dc-coupled amplifier front end including an
3. Input signal conditioning included; both channels matched
AD8037 low distortion, high bandwidth amplifier that provides
for gain.
high input impedance and gain and drives the AD8138 single-
to-differential amplifier. The AD6644s have on-chip track-and-
hold circuitry and utilize an innovative multipass architecture
4. Fully tested/characterized performance.
5. Footprint-compatible family; 68-lead CLCC package.
to achieve 14-bit, 65 MSPS performance.
FUNCTIONAL BLOCK DIAGRAM
AINA3 AINA2 AINA1
87
6
REF_A
3
AINB3 AINB2 AINB1
64 63 62
DRAOUT 12
D0A (LSB) 15
D1A 16
56 REF_B
D2A 17
D3A 18
D4A 19
D5A 20
D6A 21
D7A 22
D8A 23
D9A 24
D10A 25
AD10465
TIMING
VREF
DROUT
11
14
OUTPUT BUFFERING
3
28
29 31 32
33
34
55 DRBOUT
TIMING
52 ENCODEB
51 ENCODEB
VREF
DROUT
14
49 D13B (MSBB)
48 D12B
5
47 D11B
OUTPUT BUFFERING
9
46 D10B
45 D9B
35 36 37 38 39 40 41 42
ENCODEA ENCODEA D11 D12A D13A (MSBA) D0B (LSBB) D1B D2B D3B D4B D5B D6B D7B D8B
Figure 1.
Rev. B
Document Feedback
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700 ©2001–2015 Analog Devices, Inc. All rights reserved.
Technical Support
www.analog.com

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AD10465 pdf, ピン配列
AD10465
TABLE OF CONTENTS
Features .............................................................................................. 1
Applications....................................................................................... 1
General Description ......................................................................... 1
Product Highlights ........................................................................... 1
Functional Block Diagram .............................................................. 1
Revision History ............................................................................... 2
Specifications..................................................................................... 3
Test Circuits....................................................................................... 6
Absolute Maximum Ratings............................................................ 7
ESD Caution.................................................................................. 7
Pin Configuration and Pin Function Descriptions...................... 8
Typical Performance Characteristics ............................................. 9
Terminology .................................................................................... 11
REVISION HISTORY
7/15—Rev. A to Rev. B
Updated Outline Dimensions ....................................................... 24
Changes to Ordering Guide .......................................................... 24
3/06—Rev. 0 to Rev. A
Remove AZ Grade ..............................................................Universal
Changes to General Description Section ...................................... 1
Changes to Table 1............................................................................ 3
Inserted Test Circuits Section ......................................................... 6
Updates to Ordering Guide........................................................... 24
1/01—Revision 0: Initial Version
Data Sheet
Theory of Operation ...................................................................... 12
Using the Flexible Input ............................................................ 12
Applying the AD10465 .................................................................. 13
Encoding the AD10465 ............................................................. 13
Jitter Considerations .................................................................. 13
Power Supplies ............................................................................ 14
Output Loading .......................................................................... 14
Layout Information.................................................................... 14
Evaluation Board ............................................................................ 15
Bill Of Materials List for AD10465 Evaluation Board........... 19
Silkscreens ................................................................................... 20
Outline Dimensions ....................................................................... 24
Ordering Guide .......................................................................... 24
Rev. B | Page 2 of 24


3Pages


AD10465 電子部品, 半導体
Data Sheet
AD10465
1 See Table 3.
2 Gain tests are performed on AIN1 input voltage range.
3 Input capacitance specification combines AD8037 die capacitance and ceramic package capacitance.
4 Full power bandwidth is the frequency at which the spectral power of the fundamental frequency (as determined by FFT analysis) is reduced by 3 dB.
5 All ac specifications tested by driving ENCODE and ENCODE differentially.
6 Minimum and maximum conversion rates allow for variation in encode duty cycle of 50% ± 5%.
7 Analog input signal power at –1 dBFS; signal-to-noise ratio (SNR) is the ratio of signal level to total noise (first five harmonics removed). ENCODE = 65 MSPS. SNR is
reported in dBFS, related back to converter full power.
8 Analog input signal power at –1 dBFS. Signal-to-noise and distortion (SINAD) is the ratio of signal level to total noise + harmonics. ENCODE = 65 MSPS.
9 Analog input signal power swept from −1 dBFS to −60 dBFS; SFDR is the ratio of converter full scale to worst spur.
10 Both input tones at −7 dBFS; two-tone intermodulation distortion (IMD) rejection is the ratio of either tone to the worst third order intermodulation product.
11 Channel-to-channel isolation tested with A channel grounded and a full-scale signal applied to B channel.
12 Digital output logic levels: DVCC = 3.3 V, CLOAD = 10 pF. Capacitive loads > 10 pF degrade performance.
13 Supply voltage recommended operating range. AVCC can be varied from 4.85 V to 5.25 V. However, rated ac (harmonics) performance is valid only over the range
AVCC = 5.0 V to 5.25 V.
Rev. B | Page 5 of 24

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部品番号部品説明メーカ
AD10465

65 MSPS A/D Converter

Analog Devices
Analog Devices


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