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PDF ISL32174E Data sheet ( Hoja de datos )
| Número de pieza | ISL32174E | |
| Descripción | (ISL32172E - ISL32179E) RS-422 Transmitters | |
| Fabricantes | Intersil Corporation | |
| Logotipo |  |
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ISL32172E, ISL32272E, ISL32372E, ISL32174E,
® ISL32274E, ISL32374E, ISL32179E
Data Sheet
December 16, 2008
FN6824.0
QUAD, ±16.5kV ESD Protected, 3.0V
to 5.5V, Low Power, RS-422 Transmitters
The Intersil ISL32x7xE are ±16.5kV IEC61000-4-2 ESD
Protected, 3.0V to 5.5V powered, QUAD transmitters for
balanced communication using the RS-422 standard. These
drivers have very low output leakage currents (±10µA), so
they present a low load to the RS-422 bus.
Driver (Tx) outputs are tri-statable, and incorporate a hot
plug feature to keep them disabled during power-up and
down. Versions are available with a common EN/EN
(‘172 pinout), a two channel EN12/EN34 (‘174 pinout), or a
versatile combination of individual and group channel
enables (see Table 1).
The ISL32372E, ISL32374E utilize slew rate limited drivers
which reduce EMI, and minimize reflections from improperly
terminated transmission lines, or from unterminated stubs in
multidrop and multipoint applications. Drivers on the other
versions are not limited, so they can achieve the 10Mbps or
32Mbps data rates. All versions are offered in Industrial and
Extended Industrial (-40°C to +125°C) temperature ranges.
A 50% smaller footprint (compared to the TSSOP) is
available with the ISL32179E’s QFN package. This device
also features a logic supply pin (VL), that sets the switching
points of the enable and DI inputs to be compatible with a
lower supply voltage in mixed voltage systems. Two speed
select pins allow the ISL32179E user to select from three
slew rate options for 460kbps, 10Mbps, or 32Mbps data
rates. Individual channel and group enable pins increase the
www.IDSaLta3S2h1e7e9t4EU’s.cfolemxibility.
Features
• IEC61000 ESD Protection on RS-422 Outputs . . ±16.5kV
- Class 3 ESD Level on all Other Pins . . . . . . 12kV HBM
- High Machine Model ESD Level on all Pins . . . . . 700V
• Wide Supply Range . . . . . . . . . . . . . . . . . . . 3.0V to 5.5V
• Specified for +125°C Operation
• Available in Industry Standard Pinouts (‘172/’174) or in a
Space Saving QFN (ISL32179E) with Added Features
• Logic Supply Pin (VL) Eases Operation in Mixed Supply
Systems (ISL32179E Only)
• User Selectable Data Rate (ISL32179E Only)
• Hot Plug - Tx Outputs Remain Three-state During
Power-up and Power-Down
• Low Tx Leakage Allows > 256 Devices on the Bus
• High Data Rates . . . . . . . . . . . . . . . . . . . . . up to 32Mbps
• Low Quiescent Supply Current . . . . . . . . . . 0.8mA (Max)
- Low Shutdown Supply Current . . . . . . . . . . . . . . . 60µA
• Current Limiting and Thermal Shutdown for Driver
Overload Protection
• Tri-statable Tx Outputs
• 5V Tolerant Logic Inputs When VCC ≤ 5V
• Pb-free (RoHS compliant)
Applications
• Telecom Equipment
• Motor Controllers / Encoders
• Programmable Logic controllers
• Industrial/Process Control Networks
PART
NUMBER
ISL32172E
ISL32272E
ISL32372E
ISL32174E
ISL32274E
ISL32374E
ISL32179E
TABLE 1. SUMMARY OF FEATURES
DATA RATE
FUNCTION (Mbps)
4 Tx 32
SLEW-RATE
LIMITED?
NO
HOT
PLUG?
YES
VL PIN?
NO
TX
ENABLE
TYPE
EN, EN
QUIESCENT
ICC (mA)
<1
4 Tx 10
NO YES NO EN, EN <1
4 Tx 0.46
YES
YES NO EN, EN
<1
4 Tx 32
NO
YES
NO EN12, EN34
<1
4 Tx 10
NO
YES
NO EN12, EN34
<1
4 Tx 0.46
YES
YES
NO EN12, EN34
<1
4 Tx 32, 10, 0.46 SELECTABLE YES
YES
INDIV. AND
GROUP
ENABLES
<1
LOW POWER
SHUTDOWN?
NO
NO
NO
NO
NO
NO
YES
PIN
COUNT
16
16
16
16
16
16
24
1 CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-468-3774 | Intersil (and design) is a registered trademark of Intersil Americas Inc.
Copyright Intersil Americas Inc. 2008. All Rights Reserved
All other trademarks mentioned are the property of their respective owners.
1 page  
ISL32172E, ISL32272E, ISL32372E, ISL32174E, ISL32274E, ISL32374E, ISL32179E
Typical Operating Circuits (1 of 4 Channels Shown)
NETWORK USING GROUP ENABLES
+3.3V TO 5V
16
VCC
+
0.1µF
ISL32x73E
3 RO R
12 EN
A2
B1
RT
+
0.1µF
+3.3V TO 5V
16
VCC
ISL32x72E
2Y
3Z
DI 1
D
EN 4
GND EN
84
GND
8
EN 12
NETWORK USING PAIRED ENABLES
+3.3V TO 5V
16
VCC
+
0.1µF
ISL32x75E
3
RO1
R
4 EN12
A1 2
B1 1
RT
+3.3V TO 5V
+
0.1µF
16
VCC
EN12 4
ISL32x74E
2 Y1
3 Z1
DI1 1
D
GND
8
GND
8
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LOGIC
DEVICE
(µP, ASIC,
UART)
NETWORK WITH VL PIN FOR INTERFACING TO LOWER VOLTAGE LOGIC DEVICES
1.8V +3.3V TO 5V
21 22
VL VCC
9 SHDNEN
+
0.1µF
15 EN ISL32x77E
4 EN
1 RO1 R
A1 24
B1 23
2 EN1
RT
+3.3V TO 5V 2.5V
+
0.1µF
24
1
21 20
VCC
VL
SHDNEN 22
ISL32179E EN 14
EN1-EN4 2,3,15,16
Y
Z
DI 23
D
EN 4
GND
10
GND
9
VCC
LOGIC
DEVICE
µP, ASIC,
UART)
USING INDIVIDUAL CHANNEL ENABLES AND
CONFIGURED FOR LOWEST SHDN SUPPLY CURRENT
NOTE: POWER-UP VCC BEFORE VL
USING ACTIVE HIGH GROUP ENABLE AND
CONFIGURED FOR LOWEST SHDN SUPPLY CURRENT
NOTE: POWER-UP VCC BEFORE VL
5 FN6824.0
December 16, 2008
5 Page 
ISL32172E, ISL32272E, ISL32372E, ISL32174E, ISL32274E, ISL32374E, ISL32179E
µcontrollers, and today most of these devices use power
supplies significantly lower than 3.3V. Thus, the logic
device’s low VOH might not exceed the VIH of a 3.3V or 5V
powered DI or enable input. Connecting the VL pin to the
power supply of the logic device (as shown in Figure 6)
reduces the DI and enable input switching points to values
compatible with the logic device’s output levels. Tailoring the
logic pin input switching points to the supply voltage of the
UART, ASIC, or µcontroller eliminates the need for a level
shifter/translator between the two ICs.
VCC = +3.3V
VCC = +2V
GND
VIH ≥ 2
DI
TXD
VOH ≤ 2
VIH ≥ 2
EN DEN
VOH ≤ 2
GND
ISL32172E
VCC = +3.3V
UART/PROCESSOR
VCC = +2V
GND
VL
DI VIH = 0.85V
TXD
VOH ≤ 2
VIH = 0.85V
EN DEN
VOH ≤ 2
GND
ISL32179E
UART/PROCESSOR
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FIGURE 6. USING VL PIN TO ADJUST LOGIC LEVELS
VL can be anywhere from VCC down to 1.5V, and Table 2
indicates typical VIH and VIL values for various VL settings
so the user can ascertain whether or not a particular VL
voltage meets his needs.
TABLE 2. VIH AND VIL vs VL FOR VCC = 3.3V OR 5V
VL (V)
1.6
VIH (V)
0.7
VIL (V)
0.45
2 0.85 0.6
2.3 1.1 0.75
2.7
1.4 (DI), 1.1 (ENs)
0.85
2.7 2 0.8
3.3 2.2 0.8
Hot Plug Function
When a piece of equipment powers up, there is a period of
time where the processor or ASIC driving the RS-422 control
lines (EN, EN, ENx) is unable to ensure that the RS-422 Tx
outputs remain disabled. If the equipment is connected to
the bus, a driver activating prematurely during power-up may
drive invalid data on the bus. To avoid this scenario, this
family incorporates a “Hot Plug” function. During power-up,
circuitry monitoring VCC ensures that the Tx outputs remain
disabled for a period of time, regardless of the state of the
enable pins. This gives the processor/ASIC a chance to
stabilize and drive the RS-422 control lines to the proper states.
ESD Protection
All pins on these devices include class 3 (>12kV) Human
Body Model (HBM) ESD protection structures, but the
RS-422 pins (driver outputs) incorporate advanced
structures allowing them to survive ESD events in excess
of ±15kV HBM, and ±16.5kV to IEC61000-4-2. The RS-422
pins are particularly vulnerable to ESD damage because
they typically connect to an exposed port on the exterior of
the finished product. Simply touching the port pins, or
connecting a cable, can cause an ESD event that might
destroy unprotected ICs. These new ESD structures
protect the device whether or not it is powered up, and
without degrading the RS-422 common mode range of
-0.3V to +6V. This built-in ESD protection eliminates the
need for board level protection structures (e.g., transient
suppression diodes), and the associated, undesirable
capacitive load they present.
IEC61000-4-2 Testing
The IEC61000 test method applies to finished equipment,
rather than to an individual IC. Therefore, the pins most likely
to suffer an ESD event are those that are exposed to the
outside world (the RS-422 pins in this case), and the IC is
tested in its typical application configuration (power applied)
rather than testing each pin-to-pin combination. The
IEC61000 standard’s lower current limiting resistor coupled
with the larger charge storage capacitor yields a test that is
much more severe than the HBM test. The extra ESD
protection built into this device’s RS-422 pins allows the
design of equipment meeting level 4 criteria without the need
for additional board level protection on the RS-422 port.
AIR-GAP DISCHARGE TEST METHOD
For this test method, a charged probe tip moves toward the
IC pin until the voltage arcs to it. The current waveform
delivered to the IC pin depends on approach speed,
humidity, temperature, etc., so it is difficult to obtain
repeatable results. The RS-422 pins withstand ±16.5kV
air-gap discharges.
CONTACT DISCHARGE TEST METHOD
During the contact discharge test, the probe contacts the
tested pin before the probe tip is energized, thereby
eliminating the variables associated with the air-gap
11 FN6824.0
December 16, 2008
11 Page | ||
| Páginas | Total 20 Páginas | |
| PDF Descargar | [ Datasheet ISL32174E.PDF ] | |
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