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PDF ISL28113 Data sheet ( Hoja de datos )

Número de pieza ISL28113
Descripción (ISL28x13) RRIO Operational Amplifier
Fabricantes Intersil Corporation 
Logotipo Intersil Corporation Logotipo



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No Preview Available ! ISL28113 Hoja de datos, Descripción, Manual

Single, Dual, Quad General Purpose Micropower,
RRIO Operational Amplifier
ISL28113, ISL28213, ISL28413
The ISL28113, ISL28213, and ISL28413 are single,
dual, and quad channel general purpose micropower,
rail-to-rail input and output operational amplifiers with
supply voltage range of 1.8V to 5.5V. Key features of
low supply current of 130µA maximum per channel at
room temperature, low bias current and the wide input
voltage range enable the ISL28x13 devices to be
excellent general purpose op-amps for a wide range of
applications.
The ISL28113 is available in the SC70-5 and SOT23-5
packages, the ISL28213 is in the MSOP8, SO8 packages,
and the ISL28413 is in the TSSOP14, SOIC14 packages.
All devices operate over the extended temperature range
of -40°C to +125°C.
Features
• Low Current Consumption . . . . . . . . . . . . . 130µA
• Wide Supply Range. . . . . . . . . . . . . 1.8V to 5.5V
• Gain Bandwidth Product . . . . . . . . . . . . . . 2MHz
• Input Bias Current . . . . . . . . . . . . . . 20pA, Max.
• Operating Temperature Range . . .-40°C to +125°C
• Packages
- ISL28113 (Single) . . . . . . . . . SC70-5, SOT23-5
- ISL28213 (Dual) . . . . . . . . . . . . . MSOP8, SO8
- ISL28413 (Quad). . . . . . . . . SOIC14, TSSOP14
Applications
• Power Supply Control/Regulation
• Process Control
• Signal Gain/Buffers
• Active Filters
• Current Shunt Sensing
• Trans-impedance Amps
Typical Application
www.DataSheet4U.com
RF
LOAD
RSENSE
RIN-
10kΩ
RIN+
10kΩ
VREF
100kΩ
IN- -
V+
ISL28x13
IN+ +
V-
+5V
VOUT
RREF+
100kΩ
GAIN = 10
SINGLE-SUPPLY, LOW-SIDE CURRENT SENSE AMPLIFIER
November 20, 2009
FN6728.2
1 CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-468-3774 | Intersil (and design) is a registered trademark of Intersil Americas Inc.
Copyright Intersil Americas Inc. 2009. All Rights Reserved
All other trademarks mentioned are the property of their respective owners.

1 page




ISL28113 pdf
ISL28113, ISL28213, ISL28413
Electrical Specifications VS+ = 5V, VS- = 0V, RL = Open, VCM = VS/2, TA = +25°C, unless otherwise specified. Boldface limits
apply over the operating temperature range, -40°C to +125°C, unless otherwise specified.
PARAMETER
DESCRIPTION
CONDITIONS
MIN
(Note 6)
TYP
MAX
(Note 6)
UNIT
IS Supply Current per Amplifier RL = OPEN
90 130
170
µA
µA
ISC+
Output Source Short Circuit
Current
RL = 10Ω to V-
-22 mA
ISC-
Output Sink Short Circuit
Current
RL = 10Ω to V+
16 mA
AC SPECIFICATIONS
GBWP
eN VP-P
Gain Bandwidth Product
Peak-to-Peak Input Noise
Voltage
VS = ±2.5V
AV = 100, RF = 100kΩ,
RG = 1kΩ, RL = 10kΩ to
VCM
VS = ±2.5V
f = 0.1Hz to 10Hz
2 MHz
14 µVP-P
eN Input Noise Voltage Density VS = ±2.5V
f = 1kHz
55 nV/(Hz)
iN Input Noise Current Density VS = ±2.5V
f = 1kHz
5 fA/(Hz)
Cin Differential Input Capacitance VS = ±2.5V
Common Mode Input
f = 1MHz
Capacitance
1.0 pF
1.3 pF
TRANSIENT RESPONSE
SR Slew Rate 20% to 80% VOUT VOUT = 0.5V to 4.5V
1 V/µs
tr, tf, Small Signal
Rise Time, tr 10% to 90%
Fall Time, tf 10% to 90%
VS = ±2.5V
AV = +1, VOUT = 0.05VP-P,
RF = 0Ω, RL = 10kΩ,
CL = 15pF
100
115
ns
ns
ts
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Settling Time to 0.1%, 4VP-P
Step
VS = ±2.5V
AV = +1, RF = 0Ω,
RL = 10kΩ, CL = 1.2pF
7.5 µs
NOTE:
6. Parameters with MIN and/or MAX limits are 100% tested at +25°C, unless otherwise specified. Temperature limits established
by characterization and are not production tested.
5 FN6728.2
November 20, 2009

5 Page





ISL28113 arduino
ISL28113, ISL28213, ISL28413
Vin+
En
R22
5E11
R23
5E11
Vin-
V--
En
R21
800E3
28
Voltage Noise Stage
V9 29 DN
D13
0.00035V
+ V1
2 - 1E-6V
I2
5E-3
CinDiff
1.02pF
Cin1
1.26pF
R1 R2
+-
+
-
Vc
Vmid
1.0004 1.0004
3
EOS
1
R3
R4
10 10
In+ M14 5
Cin2
1.26pF
7
I1
5E-3
4
6
M15
M16
9
R5
10
11
8 10
R6
10
12
IOS
25E-12
R7 R8
11
13
+1E-6V
- V2
M17
Input Stage
G1A
+
-
G2A
V++
RA1
1
14 R9
DX
D1
100 DX
D2
RA2
1
R10
1E9
4
15
5
Vc
Vmid
1ST Gain Stage
V--
VCM
V++
4
5
Vc
G1
+
-
D3
17
DX
+
V3
R11
- 0.61V 1
16
Vmid
G2
+ V4
R12
1
18 - 0.61V
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V--
D4
DX
VCM
V++
V+
1ST Gain Stage (Cont)
+
-
+-
V+
E2
G7
+
-
ISY
Vg
90uA
Vmid
V-
+-
-
+
E3
-
+
V-
V-- G8
G3
+
-
D5
19
DX
+
V5
- 0.604V
318.329E3
R13
C2
5.0nF
Vg
Vmid
G5
+
-
L1
21
Vc
4.5474
R15
1E6
V++
Vg
G4 0.604V
+ V6
20 -
D6
DX
2nd Gain Stage
C3
5.0nF
R14
318.329E3
E4
+
-
+-
R16 Vmid
G6 1E6
22
L2
4.5474
V--
VCM
Mid Supply Ref Common Mode Gain Stage
C4
10pF
R17
5305.32
23
R18
5305.32
C3
10pF
D7
D8
D11
DY
D9
DX
26
DX 24
DX
25
D10
DX
27 V7
G11
-
+
0.08V
V8
0.08V
G12
+
-
+ D12
- DY
G9 G10
VOUT
R19
50
R20
50
VOUT
Supply Isolation Stage
Pole Stage
Output Stage
FIGURE 20. SPICE SCHEMATIC
11 FN6728.2
November 20, 2009

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