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LY61256 の電気的特性と機能

LY61256のメーカーはLyontekです、この部品の機能は「32K X 8 BIT HIGH SPEED CMOS SRAM」です。


製品の詳細 ( Datasheet PDF )

部品番号 LY61256
部品説明 32K X 8 BIT HIGH SPEED CMOS SRAM
メーカ Lyontek
ロゴ Lyontek ロゴ 




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LY61256 Datasheet, LY61256 PDF,ピン配置, 機能
®
Rev. 1.5
LY61256
32K X 8 BIT HIGH SPEED CMOS SRAM
REVISION HISTORY
Revision
Rev. 1.0
Rev. 1.1
Rev. 1.2
Rev. 1.3
Rev. 1.4
Rev. 1.5
Description
Initial Issue
Delete Icc1/ ISB Spec.
Adding Skinny P-DIP
Revised STSOP Package Outline Dimension
Revised VTERM to VT1 and VT2
Revised Test Condition of ISB1/IDR
Added LL Spec.
Revised Test Condition of ICC
Revised FEATURES & ORDERING INFORMATION
Lead free and green package available to Green package
available
Deleted TSOLDER in ABSOLUTE MAXIMUN RATINGS
Added packing type in ORDERING INFORMATION
Issue Date
Jul.25.2004
Sep.21.2004
Aug.18.2005
Mar.26.2008
Feb.2.2009
Apr.17.2009
www.DataSheet4U.com
Lyontek Inc. reserves the rights to change the specifications and products without notice.
5F, No. 2, Industry E. Rd. IX, Science-Based Industrial Park, Hsinchu 300, Taiwan.
TEL: 886-3-6668838
FAX: 886-3-6668836
0

1 Page





LY61256 pdf, ピン配列
®
Rev. 1.5
LY61256
32K X 8 BIT HIGH SPEED CMOS SRAM
PIN CONFIGURATION
A14 1
A12 2
A7 3
A6 4
A5 5
A4 6
A3 7
A2 8
A1 9
A0 10
I/O1 11
I/O2 12
I/O3 13
Vss 14
28 Vcc
27 WE#
26 A13
25 A8 OE# 1
A11 2
24 A9 A9
3
A8
23 A11 A13
4
5
WE#
22 OE# Vcc
6
7
21 A10 A14
A12
8
9
20 CE# A7
A6
10
11
19 I/O8 A5
12
A4
18 I/O7 A3
13
14
17 I/O6
16 I/O5
15 I/O4
LY61256
STSOP
28 A10
27 CE#
26 I/O8
25 I/O7
24 I/O6
23 I/O5
22 I/O4
21 Vss
20 I/O3
19 I/O2
18 I/O1
17 A0
16 A1
15 A2
Skinny P-DIP/SOJ
ABSOLUTE MAXIMUN RATINGS*
PARAMETER
SYMBOL
RATING
UNIT
Voltage on VCC relative to VSS
VT1 -0.5 to 6.5
V
Voltage on any other pin relative to VSS
VT2 -0.5 to VCC+0.5
V
Operating Temperature
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0 to 70(C grade)
TA -20 to 80(E grade)
-40 to 85(I grade)
Storage Temperature
TSTG
-65 to 150
Power Dissipation
PD 1 W
DC Output Current
IOUT 50 mA
*Stresses greater than those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress
rating only and functional operation of the device or any other conditions above those indicated in the operational sections of this
specification is not implied. Exposure to the absolute maximum rating conditions for extended period may affect device reliability.
TRUTH TABLE
MODE
Standby
CE#
H
Output Disable
L
Read
L
Write
L
Note: H = VIH, L = VIL, X = Don't care.
OE#
X
H
L
X
WE#
X
H
H
L
I/O OPERATION
High-Z
High-Z
DOUT
DIN
SUPPLY CURRENT
ISB1
ICC
ICC
ICC
Lyontek Inc. reserves the rights to change the specifications and products without notice.
5F, No. 2, Industry E. Rd. IX, Science-Based Industrial Park, Hsinchu 300, Taiwan.
TEL: 886-3-6668838
FAX: 886-3-6668836
2


3Pages


LY61256 電子部品, 半導体
®
Rev. 1.5
TIMING WAVEFORMS
READ CYCLE 1 (Address Controlled) (1,2)
Address
Dout
tRC
Previous Data Valid
tAA
LY61256
32K X 8 BIT HIGH SPEED CMOS SRAM
tOH
Data Valid
READ CYCLE 2 (CE# and OE# Controlled) (1,3,4,5)
Address
CE#
OE#
Dout
tRC
tAA
tACE
High-Z
tOLZ
tCLZ
tOE
tOH
tOHZ
tCHZ
Data Valid
High-Z
www.DaNtaoStehsee: t4U.com
1.WE# is high for read cycle.
2.Device is continuously selected OE# = low, CE# = low.
3.Address must be valid prior to or coincident with CE# = low,; otherwise tAA is the limiting parameter.
4.tCLZ, tOLZ, tCHZ and tOHZ are specified with CL = 5pF. Transition is measured ±500mV from steady state.
5.At any given temperature and voltage condition, tCHZ is less than tCLZ , tOHZ is less than tOLZ.
Lyontek Inc. reserves the rights to change the specifications and products without notice.
5F, No. 2, Industry E. Rd. IX, Science-Based Industrial Park, Hsinchu 300, Taiwan.
TEL: 886-3-6668838
FAX: 886-3-6668836
5

6 Page



ページ 合計 : 13 ページ
 
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共有リンク

Link :


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